Re: [Bloat] RED against bufferbloat

[MUSCARIELLO Luca IMT/OLN <luca.muscariello@orange.com>]

On 02/25/2015 02:36 PM, Mikael Abrahamsson wrote:
>>
>
> As I said before, doing FQ_CODEL in the AR is an expensive proposition 
> for medium and high speed access. So if this could successfully be 
> pushed to the CPE it would mean it would be more widely deployed.
I do not agree. Well, it depends on what you mean with expensive.

Doing FQ in silicon is easy. It must be very easy as I did myself in a 
MIPS Ikanos Vx185 chipset
and I am not an hardware expert. This was for a CPE with a 5X1Gbps ports.

If you go a little deeper in the network and you pick an OLT you won't 
find much intelligence.
A little deeper and in a local aggregation router (all vendors) you'll 
find what you would
need to implement FQ. A card here is already managing several ports at 
10Gbps and the
challenge is more or less the same as in the CPE down to the customer 
(with downsized rates/fanouts
and resources: cpu and memory).
The hardware resources (CPU and memory)
available in current  equipment are sized to do shaping/policy and some 
AQMs.
No guarantees it works as you would expect but technically FQ is not 
expensive if
properly implemented.

If you mean that it is expensive in terms of time (and probably money) 
to educate equipment
vendors that we need much more than what you have now, than yes I do agree.

At the same time I acknowledge, as Bob wrote somewhere in this thread, 
that doing
nothing is worse than doing something, even if suboptimal.

Some "positive" view: access with Gbps (up to 1Gbps) with a range of RTT 
(1ms to 100ms)
will need smarter mechanisms in the equipment as inefficiencies will be 
crystal clear
and business consequences will be substantially different.

  Luca