From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lb0-x22d.google.com (mail-lb0-x22d.google.com [IPv6:2a00:1450:4010:c04::22d]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by huchra.bufferbloat.net (Postfix) with ESMTPS id 70E0021F2CE for ; Wed, 28 May 2014 04:00:49 -0700 (PDT) Received: by mail-lb0-f173.google.com with SMTP id 10so5764657lbg.18 for ; Wed, 28 May 2014 04:00:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to; bh=7UKH5SDBuzCi8XgQv45VNDUKzOGLUR/vH9q8JeCOrBk=; b=u6sV6LwNXOg6+OOb/xd4Bu8oo22U3sR2XplHzl0QdWx87RpXtVTN5OoeSMc0l95Cdv d3ZHcwH4dsOBaUHyPkvkEWcGtfzdqkdjtgwUuD//okw65U7Cv+K2SqDFNM+mWEl5d3/b h+gLnBJsIbcR1LB9maoulNBLRnqNNFR18UvfM9RoDsTMcRPLBOkeQ71lmoYKF12r5hzk CZJf/Okt4iMV1oQqEbXTGXMM7lmmoInWPcWXd53hU5OMucVL8nFD00Irzk8YfMdtg8oK GxTJivUrV41KkoY1pZHFNnVx3N21Y5q1OD3mXYyjtdnY0CAYyIuXoAtax2ahpOvMZEz8 Jujg== X-Received: by 10.152.87.80 with SMTP id v16mr2036461laz.77.1401274846674; Wed, 28 May 2014 04:00:46 -0700 (PDT) Received: from bass.home.chromatix.fi (178-55-43-250.bb.dnainternet.fi. [178.55.43.250]) by mx.google.com with ESMTPSA id o8sm15682571laj.10.2014.05.28.04.00.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 28 May 2014 04:00:45 -0700 (PDT) Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Jonathan Morton In-Reply-To: <20140528093920.9351E406062@ip-64-139-1-69.sjc.megapath.net> Date: Wed, 28 May 2014 14:00:42 +0300 Content-Transfer-Encoding: quoted-printable Message-Id: <5AB607A3-A4EA-4B6E-A0F6-7FA0ED9B36E7@gmail.com> References: <20140528093920.9351E406062@ip-64-139-1-69.sjc.megapath.net> To: Hal Murray X-Mailer: Apple Mail (2.1085) Cc: bloat@lists.bufferbloat.net Subject: Re: [Bloat] ipspace.net: "QUEUING MECHANISMS IN MODERN SWITCHES" X-BeenThere: bloat@lists.bufferbloat.net X-Mailman-Version: 2.1.13 Precedence: list List-Id: General list for discussing Bufferbloat List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 May 2014 11:00:50 -0000 On 28 May, 2014, at 12:39 pm, Hal Murray wrote: >> in non discarding scheduling total delay is conserved, >> irrespective of the scheduling discipline >=20 > Is that true for all backplane/switching topologies? It's a mathematical truth for any topology that you can reduce to a = black box with one or more inputs and one output, which you call a = "queue" and which *does not discard* packets. Non-discarding queues = don't exist in the real world, of course. The intuitive proof is that every time you promote a packet to be = transmitted earlier, you must demote one to be transmitted later. A = non-FIFO queue tends to increase the maximum delay and decrease the = minimum delay, but the average delay will remain constant. >> The question is if (codel/pie/whatever) AQM makes sense at all for = 10G/40G >> hardware and higher performance irons? Igress/egress bandwidth is = nearly >> identical, a larger/longer buffering should not happen. Line card = memory is >> limited, a larger buffering is defacto excluded.=20 >=20 > The simplest interesting case is where you have two input lines = feeding the=20 > same output line. >=20 > AQM may not be the best solution, but you have to do something. = Dropping any=20 > packet that won't fit into the buffer is probably simplest. The relative bandwidths of the input(s) and output(s) is also relevant. = You *can* have a saturated 5-port switch with no dropped packets, even = if one of them is a common uplink, provided the uplink port has four = times the bandwidth and the traffic coming in on it is evenly = distributed to the other four. Which yields you the classic tail-drop FIFO, whose faults are by now = well documented. If you have the opportunity to do something better = than that, you probably should. The simplest improvement I can think of = is a *head*-drop FIFO, which gets the congestion signal back to the = source quicker. It *should* I think be possible to do Codel at 10G (if = not 40G) by now; whether or not it is *easy* probably depends on your = transistor budget. - Jonathan Morton