From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.taht.net (mail.taht.net [IPv6:2a01:7e00::f03c:91ff:feae:7028]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id A26F13BA8E for ; Wed, 28 Nov 2018 02:24:09 -0500 (EST) Received: from dancer.taht.net (unknown [IPv6:2603:3024:1536:86f0:eea8:6bff:fefe:9a2]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.taht.net (Postfix) with ESMTPSA id 1309321B39; Wed, 28 Nov 2018 07:24:07 +0000 (UTC) From: Dave Taht To: Jonathan Morton Cc: Pete Heist , bloat References: <6C1479A8-43E8-4F89-BCEA-1D28CA3E8589@heistp.net> <87r2fbzrng.fsf@taht.net> <4FB37CD5-0DAB-479E-8C8C-671D442D668E@akamai.com> <20181127103114.3f403d8a@xeon-e3> <2DAA554D-04AD-4C63-ADE8-338BA68C9F16@gmail.com> Date: Tue, 27 Nov 2018 23:23:55 -0800 In-Reply-To: (Jonathan Morton's message of "Wed, 28 Nov 2018 00:36:25 +0200") Message-ID: <87pnup1x84.fsf_-_@taht.net> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Subject: [Bloat] hardware diversions X-BeenThere: bloat@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: General list for discussing Bufferbloat List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Nov 2018 07:24:09 -0000 Jonathan Morton writes: > Just to add - I think the biggest impediment to experimentation in > asynchronous logic is the complete absence of convenient Muller > C-element gates in the 74-series logic family. If you want to build > some, I recommend using NAND and OR gates as inputs to active-low SR > flipflops. Need millions of transistors, not dozens. :) To me the biggest barrier is in tools. I'm still looking for the caltech tool and language which really helped in thinking in this way, and I did find it on github once, and it still seemed developed.... And the field is not entirely dead, after all. I keep meaning to pick up one of the new risc-v boards. Here's a async design of the risc-v... in GO of all things. (I also really hate the universal adoption of java amongst the circuit design folk... and I really loved the prospects of chisel, except for the jvm dependency): https://www.inf.pucrs.br/~calazans/publications/2017_MarcosSartori_EoTW.pdf in the risc-v world, well, it's still trundling forward. https://www.lowrisc.org/about/ This is pretty neat - standby is 2uA: https://greenwaves-technologies.com/en/gap8-product/ And pulp is pretty neat. https://pulp-platform.org// Still, I liked xmos's stuff... rexcomputing hasn't surfaced in a while In the last weird hardware embedded news of the day, you can get a old intel compute stick for 34 dollars on ebay. https://www.ebay.com/p/Intel-Compute-Stick-STCK1A8LFC-Intel-Atom-Z3735F-1-33GHz-8GB-PC-Stick-BOXSTCK1A8LFC/11020833331?iid=153273128090&chn=ps they were painfully slow but fit on your keychain. The most modern version of this design is https://www.amazon.com/Intel-Compute-Computer-processor-BOXSTK2m3W64CC/dp/B01AZC4IKK/ref=sr_1_4?s=electronics&ie=UTF8&qid=1543389564&sr=1-4&keywords=intel+compute+stick 2 cores, 4MB of cache, 64GB of flash... on your keychain. I rather miss vga in that it would be better to be able to screw these in...