Re: [Bloat] ipspace.net: "QUEUING MECHANISMS IN MODERN SWITCHES"

[David Lang <david@lang.hm>]

On Tue, 27 May 2014, Hagen Paul Pfeifer wrote:

> The question is if (codel/pie/whatever) AQM makes sense at all for
> 10G/40G hardware and higher performance irons? Igress/egress bandwidth
> is nearly identical, a larger/longer buffering should not happen. Line
> card memory is limited, a larger buffering is defacto excluded.

what if your router has more than two 40G interfaces? then you can have traffic 
patters where traffic inbound on connections #1 and #2 are trying to go out #3 
at a rate higher than it can handle.

At that point, you have two options

1. drop the packets

2. buffer them and hope that this is a temporary spike

if you buffer them, then the question of what queuing to use, simple FIFO, 
codel, or ??? as well as how large the buffer should be allowed to grow before 
you start dropping (at which point, which packets do you drop)

So I think that even on such big iron devices, there is room for the same sort 
of queueing options as for lower speed connections, but processor speed and 
memory size may limit how much you can do.

David Lang