Re: [Bloat] known buffer sizes on switches

[Mikael Abrahamsson <swmike@swm.pp.se>]

On Sat, 24 Nov 2018, Dave Taht wrote:

> https://people.ucsc.edu/~warner/buffer.html

Nice resource, thanks.

If someone wonders why things look the way they do, so it's all about 
on-die and off-die memory. Either you use off-die or on-die memory, often 
SRAM which requires 6 gates per bit. So spending half a billion gates 
gives you ~10MB buffer on-die. If you're doing off-die memory (DRAM or 
similar) then you'll get the gigabytes of memory seen in some equipment. 
There basically is nothing in between. As soon as you go off-die you might 
as well put at least 2-6 GB in there.

Also, off-die memory takes IO capacity. A forwarding chip might have 4 
"sides" with I/O lanes sets. If you put it in a 1RU device with no buffer, 
you can connect ports to all of the lanes. This gives you a very high port 
density low buffer size device and a very good price point.

Now, if you want more buffer and more route memory (taking one "side" 
each) plus connecting it to a backplane (another side), you now only have 
a single "side" left for ports. This is why high route-count, high buffer, 
modular switches are so much more expensive compared low-route, 
low-buffer, fixed configuration ones.

Above is principle, there are of course combinations and optimizations to 
be made so not all devices adhere exactly to the above.

-- 
Mikael Abrahamsson    email: swmike@swm.pp.se