From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x234.google.com (mail-wr0-x234.google.com [IPv6:2a00:1450:400c:c0c::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id DC98C3B2A4 for ; Fri, 10 Feb 2017 04:21:33 -0500 (EST) Received: by mail-wr0-x234.google.com with SMTP id i10so103156562wrb.0 for ; Fri, 10 Feb 2017 01:21:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:subject:from:in-reply-to:date:cc:message-id:references :to; bh=dvKTA3bJRNLZPqNe1m4yX3hTbJ777eSBNnE/Q6+SOtM=; b=BHUEotCyyjtuQDwPleSqEEEz5kcarlkGSYRla20Kv16FayEgKfV3wIjLAG/SAwhP+c x6j8miHsPdOjxP75DCqwqxQEXkipyftA+W/8Zs7nBnFUn+RADK5/s7HBl9UqA9rJ7gdP 9x8A4kEPEjkRFyRElF+iEKLZVA8PAI/A7zvv4YGn5Cju1L5jOLbgCUUB1Jg2cVw0/dVa kTP8OMnJMOfXUJ0M/McGdEFr4HVH0rN5RxSP75XcKM5RA33txN+057+Xg7eoIlXfpmtB jZMKkctpStTSX4c3hORjZFOIXg40IyMONmeEmLLPL7v5J9b/SRSoT4HyjeXeaicI1ywS 9PAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:subject:from:in-reply-to:date:cc :message-id:references:to; bh=dvKTA3bJRNLZPqNe1m4yX3hTbJ777eSBNnE/Q6+SOtM=; b=WObyGX/N0CDWFX3Xsquagh8YhN45ESPFfGfnCUpTeah/eZJqDZCQvPepuaQH46AKPQ LykXmpL0hPMOPHkq0sceWfba6owTLeqsIk9DzhiXCDhAI2LQiv+pTFhrDlwj25u6rGlF QbEyO/PrrPOEcd8XDqNo5JdstYHMGOZdeaVFTzMPgkdqwyD8IYCaXNBvIVYEG9+t0Pxg ZdJXaN3n1FLP7l6FVNB/QOzq/pA94DecXqP79YhHbR6Atd353X0p+r/UQ+NxoWrxlp2C hfEqIfO67z3U/waZmXOu8kEKsu6QSb4UjSbZtEuGMFtuqse+h2NlXCAtdfVJ+wGAGXG9 wWDQ== X-Gm-Message-State: AMke39m8PahgjC3Bx6aPz6eyleUcEcH49oF//rLBx0IeNfiY21NY2EDZcLITE3T8S2yiug== X-Received: by 10.223.142.111 with SMTP id n102mr6512920wrb.11.1486718492705; Fri, 10 Feb 2017 01:21:32 -0800 (PST) Received: from [10.72.0.34] (h-1169.lbcfree.net. [185.99.119.68]) by smtp.gmail.com with ESMTPSA id q5sm1737551wrd.32.2017.02.10.01.21.31 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Feb 2017 01:21:31 -0800 (PST) Content-Type: multipart/alternative; boundary="Apple-Mail=_4ED085D8-81B3-486A-A41C-5BF2B1A4B798" Mime-Version: 1.0 (Mac OS X Mail 9.3 \(3124\)) From: Pete Heist In-Reply-To: Date: Fri, 10 Feb 2017 10:21:35 +0100 Cc: cake@lists.bufferbloat.net Message-Id: <652AA7A2-60C5-460F-AE60-CF4CB1D1D781@gmail.com> References: <459B9F17-317F-465E-8D2F-361CF47E5F32@gmail.com> <3D9E1A43-0182-4A1F-8262-6F587A79254E@gmail.com> <830143EE-20F2-42A5-A4FC-ECE7DF50C632@gmail.com> To: Jonathan Morton X-Mailer: Apple Mail (2.3124) Subject: Re: [Cake] Cake latency update X-BeenThere: cake@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Cake - FQ_codel the next generation List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2017 09:21:34 -0000 --Apple-Mail=_4ED085D8-81B3-486A-A41C-5BF2B1A4B798 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=utf-8 > On Feb 10, 2017, at 9:49 AM, Jonathan Morton = wrote: >=20 >=20 >> On 10 Feb, 2017, at 10:04, Pete Heist wrote: >>=20 >> I look forward to the throughput shifts being solved, where I see = results like this: >>=20 >> = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_100ms_80mbit/index.html >=20 > That basically looks like it=E2=80=99s run out of CPU, so there=E2=80=99= s hard choices to make over CPU allocation. Cake isn=E2=80=99t = responsible for that allocation, though it *might* be possible to = optimise its use of the CPU a little further. >=20 > If you can obtain a CPU profile of that workload on that hardware, = that might help to direct those efforts. >=20 > - Jonathan Morton I=E2=80=99d be surprised if that were a CPU problem in this case, as = that test was run with Cake on a 2.4 GHz Core 2 Duo, not so new, but far = more powerful than a typical embedded CPU. Here=E2=80=99s the CPU info: http://www.drhleny.cz/bufferbloat/hostinfo/mbp_cpuinfo.txt = Here are the results at various bitrates (all half-duplex rate limiting = on this CPU). I find it easiest to just open them in multiple browser = tabs and keyboard shift between them to compare: http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_10mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_20mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_30mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_40mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_50mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_60mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_70mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_75mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_80mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_85mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_90mbit/index.html = http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_100mbit/index.html = There are strange shifts at 30 Mbit, 40 Mbit and 70 Mbit, but I think = this hardware should be able to handle those speeds. It=E2=80=99s = interesting that the throughput shifts don=E2=80=99t seem to affect the = latency. Compare that to the results for HTB+fq_codel, which doesn=E2=80=99t show = such shifts: http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_10mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_20mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_30mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_40mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_50mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_60mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_70mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_75mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_80mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_85mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_90mbit/index.html = http://www.drhleny.cz/bufferbloat/fq_codel_hd-eth-ap_100mbit/index.html = But if you still think that could be the CPU, I can try to get a CPU = profile, if you can direct me on how to do that for Cake=E2=80=A6 Pete --Apple-Mail=_4ED085D8-81B3-486A-A41C-5BF2B1A4B798 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=utf-8
On Feb 10, 2017, at 9:49 AM, Jonathan Morton <chromatix99@gmail.com> wrote:


On 10 Feb, 2017, at = 10:04, Pete Heist <peteheist@gmail.com> wrote:

I look forward to the throughput shifts being solved, where I = see results like this:

http://www.drhleny.cz/bufferbloat/cake_hd-eth-ap_100ms_80mbit/i= ndex.html

That basically = looks like it=E2=80=99s run out of CPU, so there=E2=80=99s hard choices = to make over CPU allocation.  Cake isn=E2=80=99t responsible for = that allocation, though it *might* be possible to optimise its use of = the CPU a little further.

If you can obtain = a CPU profile of that workload on that hardware, that might help to = direct those efforts.

- Jonathan Morton

I=E2=80=99d = be surprised if that were a CPU problem in this case, as that test was = run with Cake on a 2.4 GHz Core 2 Duo, not so new, but far more powerful = than a typical embedded CPU. Here=E2=80=99s the CPU info:

http://www.drhleny.cz/bufferbloat/hostinfo/mbp_cpuinfo.txt<= /div>

Here are the results at various = bitrates (all half-duplex rate limiting on this CPU). I find it easiest = to just open them in multiple browser tabs and keyboard shift between = them to compare:













There are strange shifts at = 30 Mbit, 40 Mbit and 70 Mbit, but I think this hardware should be able = to handle those speeds. It=E2=80=99s interesting that the throughput = shifts don=E2=80=99t seem to affect the latency.

Compare that to the results for HTB+fq_codel, = which doesn=E2=80=99t show such shifts:













But if you still think = that could be the CPU, I can try to get a CPU profile, if you can direct = me on how to do that for Cake=E2=80=A6

Pete

= --Apple-Mail=_4ED085D8-81B3-486A-A41C-5BF2B1A4B798--