From: Pete Heist <peteheist@gmail.com>
To: Jonathan Morton <chromatix99@gmail.com>
Cc: cake@lists.bufferbloat.net
Subject: Re: [Cake] diffserv3 tin 2 target 50% of interval?
Date: Wed, 22 Feb 2017 13:44:12 +0100 [thread overview]
Message-ID: <B2434971-C9C2-48F7-9E89-D12A90043B19@gmail.com> (raw)
In-Reply-To: <5B0FDEF9-6F7A-4222-8B73-C421066AB111@gmail.com>
> On Feb 22, 2017, at 12:24 PM, Jonathan Morton <chromatix99@gmail.com> wrote:
>
>> On 22 Feb, 2017, at 13:12, Pete Heist <peteheist@gmail.com> wrote:
>>
>> Ok, but for what it’s worth, so far I’m not seeing this confer any benefit as far as latency is concerned. I will make full results available later, but for now, here are two plots for the rrul test
>
> The RRUL test, when viewed in Flent, only shows the latency induced by one flow (bulk) on another (ping). This is influenced mainly by the flow-isolation and priority-queue mechanisms, not by AQM. Where AQM helps is the effect of a flow on its *own* latency.
Ok, so this might explain why I haven’t seen large latency differences between sfq and fq_codel or Cake in the RRUL test. There are some differences, but they’re higher at lower bitrates.
Still, shouldn’t the latency of EF compared to BE in the same test be lower, or not?
And where can I find the latest tc?
prev parent reply other threads:[~2017-02-22 12:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-22 10:17 Pete Heist
2017-02-22 10:24 ` Jonathan Morton
2017-02-22 11:12 ` Pete Heist
2017-02-22 11:24 ` Jonathan Morton
2017-02-22 11:32 ` Toke Høiland-Jørgensen
2017-03-19 15:41 ` Pete Heist
2017-02-22 12:44 ` Pete Heist [this message]
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