From: Dave Taht <dave.taht@gmail.com>
To: Pete Heist <pete@heistp.net>
Cc: Sebastian Moeller <moeller0@gmx.de>,
Cake List <cake@lists.bufferbloat.net>
Subject: Re: [Cake] Cake vs fq_codel and c/burst on an ER-X bridge
Date: Tue, 11 Sep 2018 11:47:27 -0700 [thread overview]
Message-ID: <CAA93jw4FHeWAo+8i+1cchU5oPaXxE-4ghBBXUvb4h5tZUrq_tg@mail.gmail.com> (raw)
In-Reply-To: <5F35DA9A-C881-4D7F-9F9E-E3CFC49F8A25@heistp.net>
On Tue, Sep 11, 2018 at 11:45 AM Pete Heist <pete@heistp.net> wrote:
>
>
> On Sep 11, 2018, at 8:28 PM, Sebastian Moeller <moeller0@gmx.de> wrote:
>
>
> Yeah, good point, I left nat there because I had one port configured for routing and the other for the bridge and was sometimes swapping between the two. I realize now I actually sent the numbers for routing, not bridging. Bridging without ‘nat’ looks a bit higher (155 Mbit for cake instead of 135 Mbit). I would re-do all these tests for completeness but I’m out of time now.
>
>
> Ouch, a ten percent bandwidth cost for the nat feature certainly answeers the question whether nat should be the default…
>
>
> That probably has a lot to do with routing vs bridging though also. If I turn QoS off, the ER-X does about 250Mbit when routing and 280Mbit with the soft bridge, so that’s probably most of that difference. I’m not seeing a throughput difference above random noise between ‘nat’ and ‘nonat’. When I benchmarked it before I saw an ~1.5% CPU difference, not nothing.
>
> The last time we discussed the bust issue, I could not manage to see any difference with or without a specified burst, but I strongly believe I simply did not properly test. Btw, this is unidirectional shaping or with bidirectional saturation?
>
>
> Unidirectional. I definitely see a difference, but I wonder what criteria we (and I) used for “out of CPU’ in the past.
>
>
> So totally unscientifically me yardstick was as long as throughput increases more or less linearly with configured shaper bandwidth things are fine, and then at the candidate bandwidths I ran "top -d 1" and monitored both idle% ad sirq% with idle falling below 5% being a strong indicator of bottlenecking on cpu cycles. Dlakelan over at github (https://github.com/dlakelan/routerperf) is working on a small side project that aims for tighter multi-core aware logging of cpu usage on a router, but that has not left the early prototype stage.
>
>
> Ok, my frustration with the testing has also been variable results from run to run. My inner self is saying, yes, do some testing, but don’t spend too much time on it when it has this stochastic side to it.
> _______________________________________________
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My inner self is saying... "go out and enjoy the beautiful fall
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--
Dave Täht
CEO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-669-226-2619
prev parent reply other threads:[~2018-09-11 18:47 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-04 10:19 [Cake] Cake on elements of a bridge Georgios Amanakis
2018-09-04 10:31 ` Toke Høiland-Jørgensen
2018-09-04 12:01 ` Georgios Amanakis
2018-09-06 17:37 ` Pete Heist
2018-09-06 18:04 ` Toke Høiland-Jørgensen
2018-09-06 18:51 ` Pete Heist
2018-09-10 19:29 ` Pete Heist
2018-09-10 19:55 ` Dave Taht
2018-09-10 22:40 ` [Cake] Cake vs fq_codel and c/burst on an ER-X bridge Pete Heist
2018-09-11 7:54 ` Sebastian Moeller
2018-09-11 8:20 ` Dave Taht
2018-09-11 8:20 ` Sebastian Moeller
2018-09-11 8:30 ` Dave Taht
2018-09-11 8:43 ` Sebastian Moeller
2018-09-11 18:27 ` Pete Heist
2018-09-11 18:29 ` Dave Taht
2018-09-11 18:42 ` Dave Taht
2018-09-19 13:27 ` Sebastian Moeller
2018-09-19 17:02 ` Dave Taht
2018-09-20 10:34 ` Sebastian Moeller
2018-09-20 17:05 ` Dave Taht
2018-09-20 18:19 ` Sebastian Moeller
2018-09-20 18:31 ` Dave Taht
2018-09-11 18:09 ` Pete Heist
2018-09-11 18:28 ` Sebastian Moeller
2018-09-11 18:45 ` Pete Heist
2018-09-11 18:47 ` Dave Taht [this message]
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