From: Dave Taht <dave.taht@gmail.com>
To: Adrian Popescu <adriannnpopescu@gmail.com>
Cc: Jonathan Morton <chromatix99@gmail.com>,
Cake List <cake@lists.bufferbloat.net>
Subject: Re: [Cake] CAKE set-associative hashing
Date: Sun, 29 Oct 2017 15:20:02 -0700 [thread overview]
Message-ID: <CAA93jw5dQUebb-WvW9Xrvhkh4W1CUmNJOKSsFxXX3uY-Pyz4bw@mail.gmail.com> (raw)
In-Reply-To: <CAF3M4P3mxVrZaFu0kh6s3cGZtgxwqz-yg0KPCjh9iX99Z18cPg@mail.gmail.com>
Much of the queuing literature involving fair queuing to date has
involved either the assumption of a perfect hash, or a one way direct
hash, cake does indeed innovate here.
set associative caches, on the other hand, are well explored in CPU
designs, where a 2 or 4 way set is most common.
An open question is how many levels of associativity relative to
"ideal" and aqm'd queue depth, number of queues, and bandwidth is
"ideal". I suspect 1024 queues is low for 10GigE, high (with 8 way set
associativity) for under a gbit. It would be nice to have a formula to
calculate these relations.
More complicated is that all the 10GigE capable hardware has a low
number (often 64) of built-in direct hash mapped hardware queues,
which does re-introduce the birthday problem at a level that cake
doesn't handle, as on a hardware mq'd device, we end up with 64 cake
instances. Some gigE hardware has 4-8 hardware queues, where the
birthday problem rears it's head almost immediately.
next prev parent reply other threads:[~2017-10-29 22:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-29 10:07 Adrian Popescu
2017-10-29 10:14 ` Jonathan Morton
2017-10-29 15:38 ` Adrian Popescu
2017-10-29 22:20 ` Dave Taht [this message]
2017-10-29 22:39 ` Jonathan Morton
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