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From: Dave Taht <dave.taht@gmail.com>
To: Luca Muscariello <luca.muscariello@gmail.com>
Cc: Jonathan Morton <chromatix99@gmail.com>,
	Cake List <cake@lists.bufferbloat.net>
Subject: Re: [Cake] Modification of DRR with deficit saving
Date: Thu, 4 Jan 2018 07:42:47 -0800	[thread overview]
Message-ID: <CAA93jw6ZxR7fkpA3jUVW62X-ov_kEnAfZ-XPBCq1e2PE0kxMDw@mail.gmail.com> (raw)
In-Reply-To: <CAHx=1M6=HDOgfO45uBNySmRfKqhdkSs-Jj_Jwa9KBg9jm8DpOQ@mail.gmail.com>

On Thu, Jan 4, 2018 at 7:23 AM, Luca Muscariello
<luca.muscariello@gmail.com> wrote:
> I think the closest scheduler to Cake is this one, if I have to compare:
>
> https://team.inria.fr/rap/files/2013/12/KOR05.pdf

Try as I might, at workloads that I've been able to create (I did just
add 10GigE capability to my testbed), it's seemingly nearly impossible
to have more than a few hundred flows in memory (compared to
potentially thousands actually active), and it's unclear how to go
about thinking about it sanely.This tends to point to cake's 8 way set
associativity as being overkill, but haven't got around to trying
higher bandwidths, lower target RTTs, or, as I said, higher
bandwidths.

'course, while I disagree with this statement in the paper, and do
care a lot about handling overload sanely,

"In overload, it is necessary to apply per-flow admission control in
order to preserve good performance for admitted flows. Note that no
scheduler can avoid drastic performance degradation when offered
traffic exceeds capacity. PDRR has the advantage of allowing"

I wish I had reasonable proof that what we do in cake is truly sane,
or had some curve to apply to flows per the available bandwidth.

>
> J. Roberts et al. Implicit Service Differentiation using Deficit Round
> Robin, In Proc of ITC 2005.
>
> Luca
>
>
> On Thu, Jan 4, 2018 at 4:01 PM, Jonathan Morton <chromatix99@gmail.com>
> wrote:
>>
>> > On 4 Jan, 2018, at 4:29 pm, Toke Høiland-Jørgensen <toke@toke.dk> wrote:
>> >
>> > This popped up in my Google Scholar notifications:
>> >
>> > https://atlas.informatik.uni-tuebingen.de/~menth/papers/Menth18b.pdf
>> >
>> > Basically, they are proposing to permit a queue to accumulate a larger
>> > deficit while empty to allow light users to achieve the same throughput
>> > as heavy users (users being an endpoint with potentially multiple
>> > flows).
>> >
>> > Not sure how useful this really is, but it's somewhat related to Cake's
>> > src/dst user fairness feature, so may be of interest.
>>
>> They're trying to solve the same problem as DRR++ does, not the same one
>> as Triple Isolation does.
>>
>> As a result, they've basically proposed a bugfix to the original DRR (ie.
>> you should keep replenishing the deficit until it saturates, even if the
>> queue is temporarily empty), without gaining the full benefit of DRR++.
>>
>> Not interesting at all.
>>
>>  - Jonathan Morton
>>
>> _______________________________________________
>> Cake mailing list
>> Cake@lists.bufferbloat.net
>> https://lists.bufferbloat.net/listinfo/cake
>
>
>
> _______________________________________________
> Cake mailing list
> Cake@lists.bufferbloat.net
> https://lists.bufferbloat.net/listinfo/cake
>



-- 

Dave Täht
CEO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-669-226-2619

  reply	other threads:[~2018-01-04 15:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-04 14:29 Toke Høiland-Jørgensen
2018-01-04 14:52 ` Dave Taht
2018-01-04 15:01 ` Jonathan Morton
2018-01-04 15:23   ` Luca Muscariello
2018-01-04 15:42     ` Dave Taht [this message]
2018-01-04 15:53       ` Luca Muscariello
2018-01-04 16:20         ` Dave Taht
2018-01-04 16:24           ` Luca Muscariello
2018-01-04 16:39             ` Dave Taht
2018-01-05  8:19           ` Pete Heist
2018-01-04 15:56       ` Sebastian Moeller

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