From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-il1-x12a.google.com (mail-il1-x12a.google.com [IPv6:2607:f8b0:4864:20::12a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id E013A3B29D for ; Wed, 27 May 2020 15:30:00 -0400 (EDT) Received: by mail-il1-x12a.google.com with SMTP id a14so25291964ilk.2 for ; Wed, 27 May 2020 12:30:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :content-transfer-encoding; bh=d5Hc9vVjhXuCA/uYXLGrU/eCfkSYYKK04+h1nHgiajs=; b=la6o7P2I0OFObgyK+izlXWsKGuMNi2G9Pl+ey2mEIMHqeWrQTv4oalnt3qpaUpA/m4 PWV25EjBYN4G2Z/X9z73cPzhCdSyeU0rMCrZcsW3aSmkEU54nmOEnpyBi0//B0ZIPRfD HjRqZcbR5byNSlUiHB0q+YZqh6rxwZL9gOrk43xe1bXcttqAW+NbAEyTMxvVPtDhIFtd mSXctQ17EMhe83c4dF0IigiNb+HiZcFlMVrXAu+QmOtlzy1r/8rrQqEDke8SNjlMVwLe P6UN/gUSWE6ikeOHqX1wTjs8+mJ/Ol8R/KgSrcfwVLoYoKnBGxBA/lwExWlT462ut6Y3 Lsww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:content-transfer-encoding; bh=d5Hc9vVjhXuCA/uYXLGrU/eCfkSYYKK04+h1nHgiajs=; b=gGYDNNWCSDo0ojEOMACFm7youmUektTMCIAAFfcRucDglOZoeM+Zpe6riq68WxyYlx NACJQMiRGufwRAAZu0vHMz04qbhW6u+6u25bx3lUDl7OZokJ8vcP1M3qq1PH4x31YyaZ HinBcG21p+NtGVDJiMAQXC5cCwHS5hNztBff5lIWfqPUhaw/OBtc3Z29P6A0nftJcKuO woc3WMxn6gtVzTAPjsSwCDf43cfGLvZnB1uZMqdiGomMs02LJDuWKX5cPZNM1gLsGnGO 1ZqCUgeS/pustB+yHjeuz2UsRm5pw6CFoU54N0vfXY+c6Qo40xJ1ZS0SFAMKR4YMtJN8 HTPA== X-Gm-Message-State: AOAM531RahOoTYg6HCP9X0vqTO9ao/BgSw6iRMGHYmfMk0nOYcdGyprQ ga/z8G+wYAmoILvymF5XTf1zt03dqHc7OiAHN57nIg== X-Google-Smtp-Source: ABdhPJxO9oUQyRANBR9nf+kunx4inK2MB/84BLCXQP+QmXQefz7e60Vgi8JPeHiD9TYCDlNMbX6OTAged+sISj74M94= X-Received: by 2002:a92:5e99:: with SMTP id f25mr7668999ilg.0.1590607799900; Wed, 27 May 2020 12:29:59 -0700 (PDT) MIME-Version: 1.0 References: <20200527165527.1085151-1-olteanv@gmail.com> In-Reply-To: <20200527165527.1085151-1-olteanv@gmail.com> From: Dave Taht Date: Wed, 27 May 2020 12:29:47 -0700 Message-ID: To: Cake List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: [Cake] Fwd: [PATCH net-next] net: dsa: sja1105: offload the Credit-Based Shaper qdisc X-BeenThere: cake@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Cake - FQ_codel the next generation List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 May 2020 19:30:01 -0000 ---------- Forwarded message --------- From: Vladimir Oltean Date: Wed, May 27, 2020 at 12:15 PM Subject: [PATCH net-next] net: dsa: sja1105: offload the Credit-Based Shaper qdisc To: Cc: , , , , From: Vladimir Oltean SJA1105, being AVB/TSN switches, provide hardware assist for the Credit-Based Shaper as described in the IEEE 8021Q-2018 document. First generation has 10 shapers, freely assignable to any of the 4 external ports and 8 traffic classes, and second generation has 16 shapers. We also need to provide a dummy implementation of mqprio qdisc offload, since this seems to be necessary for shaping any traffic class other than zero. The Credit-Based Shaper tables are accessed through the dynamic reconfiguration interface, so we have to restore them manually after a switch reset. The tables are backed up by the static config only on P/Q/R/S, and we don't want to add custom code only for that family, since the procedure that is in place now works for both. Tested with the following commands: data_rate_kbps=3D34000 port_transmit_rate_kbps=3D1000000 idleslope=3D$data_rate_kbps sendslope=3D$(($idleslope - $port_transmit_rate_kbps)) locredit=3D$((-0x7fffffff)) hicredit=3D$((0x7fffffff)) tc qdisc add dev sw1p3 root handle 1: mqprio num_tc 8 tc qdisc add dev sw1p3 parent 1:1 cbs \ idleslope $idleslope \ sendslope $sendslope \ hicredit $hicredit \ locredit $locredit \ offload 1 Signed-off-by: Vladimir Oltean --- drivers/net/dsa/sja1105/sja1105.h | 2 + .../net/dsa/sja1105/sja1105_dynamic_config.c | 76 ++++++++++++ drivers/net/dsa/sja1105/sja1105_main.c | 108 ++++++++++++++++++ drivers/net/dsa/sja1105/sja1105_spi.c | 6 + .../net/dsa/sja1105/sja1105_static_config.h | 15 +++ 5 files changed, 207 insertions(+) diff --git a/drivers/net/dsa/sja1105/sja1105.h b/drivers/net/dsa/sja1105/sja1105.h index 303b21470d77..ee79749aacf1 100644 --- a/drivers/net/dsa/sja1105/sja1105.h +++ b/drivers/net/dsa/sja1105/sja1105.h @@ -84,6 +84,7 @@ struct sja1105_info { * the egress timestamps. */ int ptpegr_ts_bytes; + int num_cbs_shapers; const struct sja1105_dynamic_table_ops *dyn_ops; const struct sja1105_table_ops *static_ops; const struct sja1105_regs *regs; @@ -218,6 +219,7 @@ struct sja1105_private { struct mutex mgmt_lock; bool expect_dsa_8021q; enum sja1105_vlan_state vlan_state; + struct sja1105_cbs_entry *cbs; struct sja1105_tagger_data tagger_data; struct sja1105_ptp_data ptp_data; struct sja1105_tas_data tas_data; diff --git a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c b/drivers/net/dsa/sja1105/sja1105_dynamic_config.c index f98c98a063e7..05b62d544eb9 100644 --- a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c +++ b/drivers/net/dsa/sja1105/sja1105_dynamic_config.c @@ -142,6 +142,12 @@ #define SJA1105_SIZE_RETAGGING_DYN_CMD \ (SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_RETAGGING_ENTRY) +#define SJA1105ET_SIZE_CBS_DYN_CMD \ + SJA1105ET_SIZE_CBS_ENTRY + +#define SJA1105PQRS_SIZE_CBS_DYN_CMD \ + (SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_CBS_ENTRY) + #define SJA1105_MAX_DYN_CMD_SIZE \ SJA1105PQRS_SIZE_GENERAL_PARAMS_DYN_CMD @@ -572,6 +578,60 @@ sja1105_retagging_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd, sja1105_packing(p, &cmd->index, 5, 0, size, op); } +static void sja1105et_cbs_cmd_packing(void *buf, struct sja1105_dyn_cmd *c= md, + enum packing_op op) +{ + u8 *p =3D buf + SJA1105ET_SIZE_CBS_ENTRY; + const int size =3D SJA1105_SIZE_DYN_CMD; + + sja1105_packing(p, &cmd->valid, 31, 31, size, op); + sja1105_packing(p, &cmd->index, 19, 16, size, op); +} + +static size_t sja1105et_cbs_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size =3D SJA1105ET_SIZE_CBS_ENTRY; + struct sja1105_cbs_entry *entry =3D entry_ptr; + u8 *cmd =3D buf + size; + u8 *p =3D buf; + + sja1105_packing(cmd, &entry->port, 5, 3, SJA1105_SIZE_DYN_CMD, op); + sja1105_packing(cmd, &entry->prio, 2, 0, SJA1105_SIZE_DYN_CMD, op); + sja1105_packing(p + 3, &entry->credit_lo, 31, 0, size, op); + sja1105_packing(p + 2, &entry->credit_hi, 31, 0, size, op); + sja1105_packing(p + 1, &entry->send_slope, 31, 0, size, op); + sja1105_packing(p + 0, &entry->idle_slope, 31, 0, size, op); + return size; +} + +static void sja1105pqrs_cbs_cmd_packing(void *buf, struct sja1105_dyn_cmd = *cmd, + enum packing_op op) +{ + u8 *p =3D buf + SJA1105PQRS_SIZE_CBS_ENTRY; + const int size =3D SJA1105_SIZE_DYN_CMD; + + sja1105_packing(p, &cmd->valid, 31, 31, size, op); + sja1105_packing(p, &cmd->rdwrset, 30, 30, size, op); + sja1105_packing(p, &cmd->errors, 29, 29, size, op); + sja1105_packing(p, &cmd->index, 3, 0, size, op); +} + +static size_t sja1105pqrs_cbs_entry_packing(void *buf, void *entry_ptr, + enum packing_op op) +{ + const size_t size =3D SJA1105PQRS_SIZE_CBS_ENTRY; + struct sja1105_cbs_entry *entry =3D entry_ptr; + + sja1105_packing(buf, &entry->port, 159, 157, size, op); + sja1105_packing(buf, &entry->prio, 156, 154, size, op); + sja1105_packing(buf, &entry->credit_lo, 153, 122, size, op); + sja1105_packing(buf, &entry->credit_hi, 121, 90, size, op); + sja1105_packing(buf, &entry->send_slope, 89, 58, size, op); + sja1105_packing(buf, &entry->idle_slope, 57, 26, size, op); + return size; +} + #define OP_READ BIT(0) #define OP_WRITE BIT(1) #define OP_DEL BIT(2) @@ -661,6 +721,14 @@ struct sja1105_dynamic_table_ops sja1105et_dyn_ops[BLK_IDX_MAX_DYN] =3D { .packed_size =3D SJA1105_SIZE_RETAGGING_DYN_CMD, .addr =3D 0x31, }, + [BLK_IDX_CBS] =3D { + .entry_packing =3D sja1105et_cbs_entry_packing, + .cmd_packing =3D sja1105et_cbs_cmd_packing, + .max_entry_count =3D SJA1105ET_MAX_CBS_COUNT, + .access =3D OP_WRITE, + .packed_size =3D SJA1105ET_SIZE_CBS_DYN_CMD, + .addr =3D 0x2c, + }, [BLK_IDX_XMII_PARAMS] =3D {0}, }; @@ -755,6 +823,14 @@ struct sja1105_dynamic_table_ops sja1105pqrs_dyn_ops[BLK_IDX_MAX_DYN] =3D { .packed_size =3D SJA1105_SIZE_RETAGGING_DYN_CMD, .addr =3D 0x38, }, + [BLK_IDX_CBS] =3D { + .entry_packing =3D sja1105pqrs_cbs_entry_packing, + .cmd_packing =3D sja1105pqrs_cbs_cmd_packing, + .max_entry_count =3D SJA1105PQRS_MAX_CBS_COUNT, + .access =3D OP_WRITE, + .packed_size =3D SJA1105PQRS_SIZE_CBS_DYN_CMD, + .addr =3D 0x32, + }, [BLK_IDX_XMII_PARAMS] =3D {0}, }; diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c index 44ce7882dfb1..53bbf01ecb8e 100644 --- a/drivers/net/dsa/sja1105/sja1105_main.c +++ b/drivers/net/dsa/sja1105/sja1105_main.c @@ -1640,6 +1640,98 @@ static void sja1105_bridge_leave(struct dsa_switch *ds, int port, sja1105_bridge_member(ds, port, br, false); } +#define BYTES_PER_KBIT (1000LL / 8) + +static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv) +{ + int i; + + for (i =3D 0; i < priv->info->num_cbs_shapers; i++) + if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope) + return i; + + return -1; +} + +static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int por= t, + int prio) +{ + int i; + + for (i =3D 0; i < priv->info->num_cbs_shapers; i++) { + struct sja1105_cbs_entry *cbs =3D &priv->cbs[i]; + + if (cbs->port =3D=3D port && cbs->prio =3D=3D prio) { + memset(cbs, 0, sizeof(*cbs)); + return sja1105_dynamic_config_write(priv, BLK_IDX_C= BS, + i, cbs, true); + } + } + + return 0; +} + +static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port, + struct tc_cbs_qopt_offload *offload) +{ + struct sja1105_private *priv =3D ds->priv; + struct sja1105_cbs_entry *cbs; + int index; + + if (!offload->enable) + return sja1105_delete_cbs_shaper(priv, port, offload->queue= ); + + index =3D sja1105_find_unused_cbs_shaper(priv); + if (index < 0) + return -ENOSPC; + + cbs =3D &priv->cbs[index]; + cbs->port =3D port; + cbs->prio =3D offload->queue; + /* locredit and sendslope are negative by definition. In hardware, + * positive values must be provided, and the negative sign is impli= cit. + */ + cbs->credit_hi =3D offload->hicredit; + cbs->credit_lo =3D abs(offload->locredit); + /* User space is in kbits/sec, hardware in bytes/sec */ + cbs->idle_slope =3D offload->idleslope * BYTES_PER_KBIT; + cbs->send_slope =3D abs(offload->sendslope * BYTES_PER_KBIT); + /* Convert the negative values from 64-bit 2's complement + * to 32-bit 2's complement (for the case of 0x80000000 whose + * negative is still negative). + */ + cbs->credit_lo &=3D GENMASK_ULL(31, 0); + cbs->send_slope &=3D GENMASK_ULL(31, 0); + + return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs, + true); +} + +static int sja1105_reload_cbs(struct sja1105_private *priv) +{ + int rc =3D 0, i; + + for (i =3D 0; i < priv->info->num_cbs_shapers; i++) { + struct sja1105_cbs_entry *cbs =3D &priv->cbs[i]; + + if (!cbs->idle_slope && !cbs->send_slope) + continue; + + rc =3D sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, c= bs, + true); + if (rc) + break; + } + + return rc; +} + +static int sja1105_setup_tc_mqprio(struct dsa_switch *ds, int port, + struct tc_mqprio_qopt *offload) +{ + return 0; +} + static const char * const sja1105_reset_reasons[] =3D { [SJA1105_VLAN_FILTERING] =3D "VLAN filtering", [SJA1105_RX_HWTSTAMPING] =3D "RX timestamping", @@ -1754,6 +1846,10 @@ int sja1105_static_config_reload(struct sja1105_private *priv, sja1105_sgmii_pcs_force_speed(priv, speed); } } + + rc =3D sja1105_reload_cbs(priv); + if (rc < 0) + goto out; out: mutex_unlock(&priv->mgmt_lock); @@ -3131,6 +3227,10 @@ static int sja1105_port_setup_tc(struct dsa_switch *ds, int port, switch (type) { case TC_SETUP_QDISC_TAPRIO: return sja1105_setup_tc_taprio(ds, port, type_data); + case TC_SETUP_QDISC_MQPRIO: + return sja1105_setup_tc_mqprio(ds, port, type_data); + case TC_SETUP_QDISC_CBS: + return sja1105_setup_tc_cbs(ds, port, type_data); default: return -EOPNOTSUPP; } @@ -3408,6 +3508,14 @@ static int sja1105_probe(struct spi_device *spi) if (rc) return rc; + if (IS_ENABLED(CONFIG_NET_SCH_CBS)) { + priv->cbs =3D devm_kcalloc(dev, priv->info->num_cbs_shapers= , + sizeof(struct sja1105_cbs_entry), + GFP_KERNEL); + if (!priv->cbs) + return -ENOMEM; + } + /* Connections between dsa_port and sja1105_port */ for (port =3D 0; port < SJA1105_NUM_PORTS; port++) { struct sja1105_port *sp =3D &priv->ports[port]; diff --git a/drivers/net/dsa/sja1105/sja1105_spi.c b/drivers/net/dsa/sja1105/sja1105_spi.c index a0dacae803cc..bb52b9c841b2 100644 --- a/drivers/net/dsa/sja1105/sja1105_spi.c +++ b/drivers/net/dsa/sja1105/sja1105_spi.c @@ -515,6 +515,7 @@ struct sja1105_info sja1105e_info =3D { .qinq_tpid =3D ETH_P_8021Q, .ptp_ts_bits =3D 24, .ptpegr_ts_bytes =3D 4, + .num_cbs_shapers =3D SJA1105ET_MAX_CBS_COUNT, .reset_cmd =3D sja1105et_reset_cmd, .fdb_add_cmd =3D sja1105et_fdb_add, .fdb_del_cmd =3D sja1105et_fdb_del, @@ -530,6 +531,7 @@ struct sja1105_info sja1105t_info =3D { .qinq_tpid =3D ETH_P_8021Q, .ptp_ts_bits =3D 24, .ptpegr_ts_bytes =3D 4, + .num_cbs_shapers =3D SJA1105ET_MAX_CBS_COUNT, .reset_cmd =3D sja1105et_reset_cmd, .fdb_add_cmd =3D sja1105et_fdb_add, .fdb_del_cmd =3D sja1105et_fdb_del, @@ -545,6 +547,7 @@ struct sja1105_info sja1105p_info =3D { .qinq_tpid =3D ETH_P_8021AD, .ptp_ts_bits =3D 32, .ptpegr_ts_bytes =3D 8, + .num_cbs_shapers =3D SJA1105PQRS_MAX_CBS_COUNT, .setup_rgmii_delay =3D sja1105pqrs_setup_rgmii_delay, .reset_cmd =3D sja1105pqrs_reset_cmd, .fdb_add_cmd =3D sja1105pqrs_fdb_add, @@ -561,6 +564,7 @@ struct sja1105_info sja1105q_info =3D { .qinq_tpid =3D ETH_P_8021AD, .ptp_ts_bits =3D 32, .ptpegr_ts_bytes =3D 8, + .num_cbs_shapers =3D SJA1105PQRS_MAX_CBS_COUNT, .setup_rgmii_delay =3D sja1105pqrs_setup_rgmii_delay, .reset_cmd =3D sja1105pqrs_reset_cmd, .fdb_add_cmd =3D sja1105pqrs_fdb_add, @@ -577,6 +581,7 @@ struct sja1105_info sja1105r_info =3D { .qinq_tpid =3D ETH_P_8021AD, .ptp_ts_bits =3D 32, .ptpegr_ts_bytes =3D 8, + .num_cbs_shapers =3D SJA1105PQRS_MAX_CBS_COUNT, .setup_rgmii_delay =3D sja1105pqrs_setup_rgmii_delay, .reset_cmd =3D sja1105pqrs_reset_cmd, .fdb_add_cmd =3D sja1105pqrs_fdb_add, @@ -594,6 +599,7 @@ struct sja1105_info sja1105s_info =3D { .qinq_tpid =3D ETH_P_8021AD, .ptp_ts_bits =3D 32, .ptpegr_ts_bytes =3D 8, + .num_cbs_shapers =3D SJA1105PQRS_MAX_CBS_COUNT, .setup_rgmii_delay =3D sja1105pqrs_setup_rgmii_delay, .reset_cmd =3D sja1105pqrs_reset_cmd, .fdb_add_cmd =3D sja1105pqrs_fdb_add, diff --git a/drivers/net/dsa/sja1105/sja1105_static_config.h b/drivers/net/dsa/sja1105/sja1105_static_config.h index 5946847bb5b9..9b62b9b5549d 100644 --- a/drivers/net/dsa/sja1105/sja1105_static_config.h +++ b/drivers/net/dsa/sja1105/sja1105_static_config.h @@ -30,11 +30,13 @@ #define SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY 4 #define SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY 40 #define SJA1105ET_SIZE_AVB_PARAMS_ENTRY 12 +#define SJA1105ET_SIZE_CBS_ENTRY 16 #define SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY 20 #define SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY 32 #define SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY 16 #define SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY 44 #define SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY 16 +#define SJA1105PQRS_SIZE_CBS_ENTRY 20 /* UM10944.pdf Page 11, Table 2. Configuration Blocks */ enum { @@ -56,6 +58,7 @@ enum { BLKID_AVB_PARAMS =3D 0x10, BLKID_GENERAL_PARAMS =3D 0x11, BLKID_RETAGGING =3D 0x12, + BLKID_CBS =3D 0x13, BLKID_XMII_PARAMS =3D 0x4E, }; @@ -78,6 +81,7 @@ enum sja1105_blk_idx { BLK_IDX_AVB_PARAMS, BLK_IDX_GENERAL_PARAMS, BLK_IDX_RETAGGING, + BLK_IDX_CBS, BLK_IDX_XMII_PARAMS, BLK_IDX_MAX, /* Fake block indices that are only valid for dynamic access */ @@ -105,6 +109,8 @@ enum sja1105_blk_idx { #define SJA1105_MAX_RETAGGING_COUNT 32 #define SJA1105_MAX_XMII_PARAMS_COUNT 1 #define SJA1105_MAX_AVB_PARAMS_COUNT 1 +#define SJA1105ET_MAX_CBS_COUNT 10 +#define SJA1105PQRS_MAX_CBS_COUNT 16 #define SJA1105_MAX_FRAME_MEMORY 929 #define SJA1105_MAX_FRAME_MEMORY_RETAGGING 910 @@ -289,6 +295,15 @@ struct sja1105_retagging_entry { u64 destports; }; +struct sja1105_cbs_entry { + u64 port; + u64 prio; + u64 credit_hi; + u64 credit_lo; + u64 send_slope; + u64 idle_slope; +}; + struct sja1105_xmii_params_entry { u64 phy_mac[5]; u64 xmii_mode[5]; -- 2.25.1 --=20 "For a successful technology, reality must take precedence over public relations, for Mother Nature cannot be fooled" - Richard Feynman dave@taht.net CTO, TekLibre, LLC Tel: 1-831-435-0729