Re: [Cake] Cake3 - source code and some questions

[Adrian Popescu <adriannnpopescu@gmail.com>]

The problems I was seeing were related to c-states.

PCI-E bus ASPM power saving is disabled for the e1000e network
interfaces. This can be observed using dmesg.

Perhaps using a CPU which is low power enough for a router would help
avoid the need of deep sleep power states and other things such as
speedstep.


On Thu, Apr 23, 2015 at 2:01 PM, Toke Høiland-Jørgensen <toke@toke.dk> wrote:
> Adrian Popescu <adriannnpopescu@gmail.com> writes:
>
>> Thanks to your experiment and your statement regarding CPU load on
>> your box during testing, I was able to fix the problem.
>
> Cool!
>
>> It looks like this problem was being caused by power saving. Something
>> changed between the older kernels and the newer ones. Changing the
>> power saving settings in the BIOS brings back latency below 0.5
>> milliseconds.
>
> So is this the PCI bus power saving settings, or the CPU, or?
>
>> This might have an impact some benchmarks which don't load up all CPU
>> cores or which don't need a lot of CPU power. This is certainly
>> something to keep an eye on when doing any kind of testing involving
>> really low latencies or network schedulers.
>
> Yes, definitely. Having things be worse during idle is definitely not
> optimal. I wonder if there's a kernel-level setting that can affect this?
>
> -Toke