From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qg0-x22d.google.com (mail-qg0-x22d.google.com [IPv6:2607:f8b0:400d:c04::22d]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by huchra.bufferbloat.net (Postfix) with ESMTPS id 203DE21F35C for ; Thu, 23 Apr 2015 04:05:28 -0700 (PDT) Received: by qgeb100 with SMTP id b100so6141779qge.3 for ; Thu, 23 Apr 2015 04:05:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=1WgN68zCTNarothq6hPrOZ7ktG6NePLVBL41Lr77WPU=; b=hYWof3gIF0f038nG6kembE12yQcumABBlGD5zjEQyzbam4CkEY1AVj8grbtGz4jyny KQniHV1+HAzlS7pflgq/ycS5Nn1m8sJ0BQ2tFWLmV3icJAJBaNe/XIrXouNYKOOaWVTk wNGp1Q9kvtaCsgzfuIP3XLswaiRfzSAwb5jUppvlqb4vVVEl4uS0dp8DugvMhZ4UdDfE /6dUXekHRrYzaIVMSY2p4cFiNoMbTkupRinkNzulDKX4OeJFKMohoDivdCeYR2PmAoJt 5vadoZ1/pYFMFEpbvnL1EK+BktTc1H6VJ2yW5RKluJlaq3dGNsk5tGjqxeyTI8zcUU4W 4cAA== MIME-Version: 1.0 X-Received: by 10.55.48.16 with SMTP id w16mr3823390qkw.13.1429787127664; Thu, 23 Apr 2015 04:05:27 -0700 (PDT) Received: by 10.140.30.52 with HTTP; Thu, 23 Apr 2015 04:05:27 -0700 (PDT) In-Reply-To: <87lhhj85xs.fsf@toke.dk> References: <5BC1CA30-289D-42B4-95CD-3AE5D7B96F09@gmail.com> <87383r9q1u.fsf@toke.dk> <87lhhj85xs.fsf@toke.dk> Date: Thu, 23 Apr 2015 14:05:27 +0300 Message-ID: From: Adrian Popescu To: =?UTF-8?B?VG9rZSBIw7hpbGFuZC1Kw7hyZ2Vuc2Vu?= Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: cake@lists.bufferbloat.net Subject: Re: [Cake] Cake3 - source code and some questions X-BeenThere: cake@lists.bufferbloat.net X-Mailman-Version: 2.1.13 Precedence: list List-Id: Cake - FQ_codel the next generation List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Apr 2015 11:05:57 -0000 The problems I was seeing were related to c-states. PCI-E bus ASPM power saving is disabled for the e1000e network interfaces. This can be observed using dmesg. Perhaps using a CPU which is low power enough for a router would help avoid the need of deep sleep power states and other things such as speedstep. On Thu, Apr 23, 2015 at 2:01 PM, Toke H=C3=B8iland-J=C3=B8rgensen wrote: > Adrian Popescu writes: > >> Thanks to your experiment and your statement regarding CPU load on >> your box during testing, I was able to fix the problem. > > Cool! > >> It looks like this problem was being caused by power saving. Something >> changed between the older kernels and the newer ones. Changing the >> power saving settings in the BIOS brings back latency below 0.5 >> milliseconds. > > So is this the PCI bus power saving settings, or the CPU, or? > >> This might have an impact some benchmarks which don't load up all CPU >> cores or which don't need a lot of CPU power. This is certainly >> something to keep an eye on when doing any kind of testing involving >> really low latencies or network schedulers. > > Yes, definitely. Having things be worse during idle is definitely not > optimal. I wonder if there's a kernel-level setting that can affect this? > > -Toke