From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk0-x234.google.com (mail-qk0-x234.google.com [IPv6:2607:f8b0:400d:c09::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id 85A453B2A4 for ; Sun, 15 Jul 2018 03:41:42 -0400 (EDT) Received: by mail-qk0-x234.google.com with SMTP id c126-v6so10437675qkd.7 for ; Sun, 15 Jul 2018 00:41:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to; bh=dizyEg8MxaAMnwQT+bQAhIdQxkCopeKin8G3jxUWKaA=; b=cl7VDLtGlwdDfd5jwH2M/7g6byHvvPF+M7FVs0K8S/IYesvY4niCi1uS6XgfIH6B6f ugQMvvvTBKvTOKL8cNBQJ7893FdMgOs8fEVIt8c2TW+lu0ThVUQwCLPbLPFDru7U8pvy ZFTfBYVnClACaiUEpI7FP2QB/3an5h5sPFpz3oodTv6T3OaQOWZ+cr9zkri01Tk6JWlm KhD+RVQKLYOn0zHNOtveC3Fq+TXHRLSfg5CO1SHqZzTi2GHGkZnmjq345lvex0RdhloL eyffWrIK4bJSfen+5O5JHmi1gmYphEqz0SlZBQVqVNLd1cUSljy4NmqOqcqz6REPvv89 TYwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=dizyEg8MxaAMnwQT+bQAhIdQxkCopeKin8G3jxUWKaA=; b=i7WY+438IjtfB2KDJSqEalNd/vkHoCinmHzUw8BEvYh6Vdo6ABzbHviWXcuRtOhif3 wJQnzFRuSN+xfLjVPJyMXqeZAbZq2xoojn40J7pbb4ZsfcLT21w0irnkK5wgcQ/ryM6V meH6KTo7X6ebmvhV7lPBK4FbjQYgjOUNFMG8yDwwT7PaFC/gSgYkj9mrmwmsJaJd0GIL YTlgdpjghoHxXkijR09DlJTgALtsGb6L1MBCzVOe1IjnGlYhNptWHcIoQToacqb7IKCz LLi5kiwRVklQBViseVynkNgHWBA+ITk0p6/XtkEb0YefYKwvCMu8X4pVGYvNUBJn33Rq T8LQ== X-Gm-Message-State: AOUpUlGoXuhuW+I7eW6NVUmP+AR1904aWk/1+9rnr1Abh583yXPViqwc FQ0PiYTgSHUB9ZUyWQlNNbk0kqBPADQ0U4OHFMve9A== X-Google-Smtp-Source: AAOMgpfXr6C9iFDtXDNrBXQbiqQvBIhu1woGue4R21lfkte7muicfdbfx3tpQJCPuDpLkJ7i4eNoZ9uY8Tpp2SBM4Uc= X-Received: by 2002:a37:1b41:: with SMTP id b62-v6mr10478288qkb.343.1531640501795; Sun, 15 Jul 2018 00:41:41 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:ac8:2aa9:0:0:0:0:0 with HTTP; Sun, 15 Jul 2018 00:41:21 -0700 (PDT) From: dag dg Date: Sun, 15 Jul 2018 02:41:21 -0500 Message-ID: To: Cake@lists.bufferbloat.net Content-Type: text/plain; charset="UTF-8" Subject: [Cake] Multiple Hardware Queues X-BeenThere: cake@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Cake - FQ_codel the next generation List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 15 Jul 2018 07:41:42 -0000 Firstly let me give my congratulations to the contributors of the Cake project for Cake being accepted upstream. I've been following the project for awhile and greatly appreciate the effort that has been put into it. Ironically I just wrapped up throwing some unofficial packages together for Fedora 28 to enable cake support; having it upstream will make updates a lot easier. Now that I have cake available and running I just wanted to do one final check on a technical consideration I had brought up on the bufferbloat list a few months back, before I lay this notion to rest. Toke gave me some guidance at that time which helped point me towards cake. Now that I have it running I wanted to check in one last time to see if there's any beneficial way I can use cake with multiple hardware queues or if I need to just give up the chase. In my box I have acting as a router I have an Intel i350-t2v2 nic that has two gigabit ports(uplink/local). This card and its corresponding driver supports multiple hardware-based transmit and receive queues depending on the number of cores the system has up to 8. without cake: qdisc mq 0: dev enp2s0f0 root qdisc fq_codel 0: dev enp2s0f0 parent :8 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :7 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :6 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :5 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :4 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :3 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :2 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f0 parent :1 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc mq 0: dev enp2s0f1 root qdisc fq_codel 0: dev enp2s0f1 parent :8 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :7 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :6 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :5 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :4 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :3 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :2 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :1 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn with cake via sqm: qdisc cake 802c: dev enp2s0f0 root refcnt 9 bandwidth 23Mbit diffserv3 triple-isolate split-gso rtt 100.0ms raw overhead 0 qdisc ingress ffff: dev enp2s0f0 parent ffff:fff1 ---------------- qdisc mq 0: dev enp2s0f1 root qdisc fq_codel 0: dev enp2s0f1 parent :8 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :7 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :6 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :5 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :4 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :3 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :2 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev enp2s0f1 parent :1 limit 10240p flows 1024 quantum 1514 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc fq_codel 0: dev tun0 root refcnt 2 limit 10240p flows 1024 quantum 1500 target 5.0ms interval 100.0ms memory_limit 32Mb ecn qdisc cake 802d: dev ifb4enp2s0f0 root refcnt 2 bandwidth 330Mbit besteffort triple-isolate wash split-gso rtt 100.0ms raw overhead 0 Let me be clear that with cake and sqm I am seeing great results on the dslreports speed test(A+) so this inquiry is less about solving a problem and more along the lines of trying to take full advantage of my available hardware. Any insight would be appreciated, and thanks again for your contributions.