From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp81.iad3a.emailsrvr.com (smtp81.iad3a.emailsrvr.com [173.203.187.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id C76F03B29F for ; Thu, 6 Oct 2016 15:40:08 -0400 (EDT) Received: from smtp19.relay.iad3a.emailsrvr.com (localhost [127.0.0.1]) by smtp19.relay.iad3a.emailsrvr.com (SMTP Server) with ESMTP id A0F91C055A; Thu, 6 Oct 2016 15:40:08 -0400 (EDT) Received: from app25.wa-webapps.iad3a (relay-webapps.rsapps.net [172.27.255.140]) by smtp19.relay.iad3a.emailsrvr.com (SMTP Server) with ESMTP id 92128C029E; Thu, 6 Oct 2016 15:40:08 -0400 (EDT) X-Sender-Id: dpreed@reed.com Received: from app25.wa-webapps.iad3a (relay-webapps.rsapps.net [172.27.255.140]) by 0.0.0.0:25 (trex/5.7.7); Thu, 06 Oct 2016 15:40:08 -0400 Received: from reed.com (localhost [127.0.0.1]) by app25.wa-webapps.iad3a (Postfix) with ESMTP id 7FB7EE1BAB; Thu, 6 Oct 2016 15:40:08 -0400 (EDT) Received: by apps.rackspace.com (Authenticated sender: dpreed@reed.com, from: dpreed@reed.com) with HTTP; Thu, 6 Oct 2016 15:40:08 -0400 (EDT) Date: Thu, 6 Oct 2016 15:40:08 -0400 (EDT) From: dpreed@reed.com To: "Dave Taht" Cc: "Mikael Abrahamsson" , "cerowrt-devel@lists.bufferbloat.net" MIME-Version: 1.0 Content-Type: text/plain;charset=UTF-8 Content-Transfer-Encoding: quoted-printable Importance: Normal X-Priority: 3 (Normal) X-Type: plain In-Reply-To: References: X-Auth-ID: dpreed@reed.com Message-ID: <1475782808.5217851@apps.rackspace.com> X-Mailer: webmail/12.5.5-RC Subject: Re: [Cerowrt-devel] =?utf-8?q?anybody_know_anything_about_the_armada_?= =?utf-8?q?3700=3F?= X-BeenThere: cerowrt-devel@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Development issues regarding the cerowrt test router project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Oct 2016 19:40:08 -0000 Reading between the lines on the datasheet, the "packet processor" doesn't = look to be anything fancy or problematic. It contains:=0A=0ADMA - meaning = that it will transfer into and out of the Tx and Rx rings in RAM automatica= lly. Every NIC does DMA at the packet level.=0A=0APTP (IEEE1588) essentiall= y this just timestamps packets as they are being sent and as they are being= received on the wire. Has to be in the hardware device to make PTP precise= enough to do nanosecond-level clock sync. But the PTP protocol (which does= all kinds of fancy "frequency lock" algorithms, etc. won't be in there, ju= st the timestamping and perhaps a high res clock register.=0A=0ABuffer mana= gement - as a frame arrives off of the cable, you can't just stream it into= snd out of RAM without some buffering to cope with the multiportedness of = coherent RAM and the scatter/gather of data for a frame into RAM buffers in= the Tx/Rx rings. This would just be the logic for that.=0A=0AAlso, if you = look at the description of "features" there are no networking "features" li= sted that suggest advanced functionality or another specialized microcontro= ller doing magic.=0A=0ASo I suspect that the packet processor is less compl= ex than a typical 1 GigE NIC - no checksum offload, no TSO, no ... there's = not even a switch between the two ports. You get to do it all in software, = which is great.=0A=0AHaving NBASE-T is also pretty nice, though there's not= a lot of gear for the other end of the NBASE-T connection out there (thoug= h NBASE-T switches are becoming a standard for attaching 802.11ac in enterp= rise campuses to aggregate them into a 10 GigE or faster datacenter switch)= .=0A=0AI do have CAT-6A throughout my house, so I wonder if I can wire my h= ouse with NBASE-T if I replace my GigE switch... :-)=0A=0A=0A=0A=0A=0A=0AOn= Tuesday, October 4, 2016 12:18pm, "Dave Taht" said:= =0A=0A> On Tue, Oct 4, 2016 at 2:46 AM, Mikael Abrahamsson wrote:=0A>> On Mon, 3 Oct 2016, Dave Taht wrote:=0A>>=0A>>>=0A>>> https:= //www.kickstarter.com/projects/874883570/marvell-espressobin-board?token=3D= 6a67e544=0A>>=0A>>=0A>> Oh, oh, another device with a "packet processor".= =0A>>=0A>> http://www.marvell.com/embedded-processors/assets/Marvell-88F37x= x-Product-Brief-20160830.pdf=0A>>=0A>> Do we know anything about this packe= t processor and FOSS support for it? I=0A>> guess the "buffer manager" is v= ery much of interest to anti-bufferbloat...=0A> =0A> Well, it's a competito= r to the edgerouter X pricewise, and my hope=0A> would be with the cache co= herent I/O and the arm v8s that it could=0A> push 1Gbit with ease out each = port, regardless of offloads. USB3 makes=0A> for high speed nas capability,= (although I have high hopes for usb-c=0A> on something router-ish someday)= . Also I am gradually thinking we'll=0A> start seeing more 2.5gbit ethernet= over TP. And there's a mini-pcie=0A> slot for wifi-card-of-choice...=0A> = =0A> all at a pricepoint that's lower than almost anything I've seen with= =0A> these capabilities.=0A> =0A> Who knows, perhaps the "full SDK" will al= low for programming the=0A> packet coprocessor?=0A> /me drinks some kool-ai= d=0A> =0A> Downsides: Globalscale, historically, has had heat issues in the= ir=0A> designs. And it is quite far from shipping, as yet.=0A> =0A>>=0A>> -= -=0A>> Mikael Abrahamsson email: swmike@swm.pp.se=0A> =0A> =0A> =0A> --= =0A> Dave T=C3=A4ht=0A> Let's go make home routers and wifi faster! With be= tter software!=0A> http://blog.cerowrt.org=0A> ____________________________= ___________________=0A> Cerowrt-devel mailing list=0A> Cerowrt-devel@lists.= bufferbloat.net=0A> https://lists.bufferbloat.net/listinfo/cerowrt-devel=0A= > =0A