From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp66.iad3a.emailsrvr.com (smtp66.iad3a.emailsrvr.com [173.203.187.66]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id 4E0943B29E for ; Tue, 30 Nov 2021 17:52:36 -0500 (EST) Received: from app38.wa-webapps.iad3a (relay-webapps.rsapps.net [172.27.255.140]) by smtp17.relay.iad3a.emailsrvr.com (SMTP Server) with ESMTP id D155A25E19; Tue, 30 Nov 2021 17:52:35 -0500 (EST) Received: from deepplum.com (localhost.localdomain [127.0.0.1]) by app38.wa-webapps.iad3a (Postfix) with ESMTP id BDCBDE1BF6; Tue, 30 Nov 2021 17:52:35 -0500 (EST) Received: by apps.rackspace.com (Authenticated sender: dpreed@deepplum.com, from: dpreed@deepplum.com) with HTTP; Tue, 30 Nov 2021 17:52:35 -0500 (EST) X-Auth-ID: dpreed@deepplum.com Date: Tue, 30 Nov 2021 17:52:35 -0500 (EST) From: "David P. Reed" To: "Dave Taht" Cc: "cerowrt-devel" MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_20211130175235000000_52481" Importance: Normal X-Priority: 3 (Normal) X-Type: html In-Reply-To: References: X-Client-IP: 209.6.168.128 Message-ID: <1638312755.776218387@apps.rackspace.com> X-Mailer: webmail/19.0.13-RC X-Classification-ID: 90193621-1d4c-48a7-b4a2-71a6c7b75777-1-1 Subject: Re: [Cerowrt-devel] =?utf-8?q?risc-v_options=3F?= X-BeenThere: cerowrt-devel@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Development issues regarding the cerowrt test router project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Nov 2021 22:52:36 -0000 ------=_20211130175235000000_52481 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable =0AFor what? I have recently gotten a MicroSemi RISC-V SoC board with embed= ded FPGA (or maybe it is better thought of as an FPGA board with multicore = hard logic RISC-V host.) Runs Linux very fast. It's not set up to be a rout= er, though - not unless I populate its PCIe slot with NICs. Standard Linux= drivers for PCIe devices all work quite well, so far.=0A =0AThese early 64= bit RISC-V implementations are pretty darn good, but unlike Intel's Xeons,= they don't yet handle memory channel performance very well.=0A =0A(The 32-= bit RISC-V's are really competing with ARM based microcontrollers for embed= ded systems. I don't find them interesting, though I have a couple sample b= oards with 32 bit RISC-V cores).=0A =0AA random guess on my part: even cons= umer routers will be moving to 64-bit processor designs in the next couple = years. That's because the price difference is getting quite small, as a per= centage of total product cost, and because it is hard to buy "small memory = address space" DIMMs. I could be wrong, but extrapolation from today's tren= ds suggests that is more likely than not.=0A =0A =0AOn Friday, November 26,= 2021 3:02pm, "Dave Taht" said:=0A=0A=0A=0A> has anyo= ne tried the latest generations of risc-v?=0A> =0A> https://linuxgizmos.com= /17-sbc-runs-linux-on-allwinner-d1-risc-v-soc/=0A> =0A> --=0A> I tried to b= uild a better future, a few times:=0A> https://wayforward.archive.org/?site= =3Dhttps%3A%2F%2Fwww.icei.org=0A> =0A> Dave T=C3=A4ht CEO, TekLibre, LLC=0A= > _______________________________________________=0A> Cerowrt-devel mailing= list=0A> Cerowrt-devel@lists.bufferbloat.net=0A> https://lists.bufferbloat= .net/listinfo/cerowrt-devel=0A> ------=_20211130175235000000_52481 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

For what? I have recen= tly gotten a MicroSemi RISC-V SoC board with embedded FPGA (or maybe it is = better thought of as an FPGA board with multicore hard logic RISC-V host.) = Runs Linux very fast. It's not set up to be a router, though - not unless I= populate its PCIe  slot with NICs. Standard Linux drivers for PCIe de= vices all work quite well, so far.

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These early 64 bit RISC-V implementations are pretty d= arn good, but unlike Intel's Xeons, they don't yet handle memory channel pe= rformance very well.

=0A

 

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(The 32-bit RISC-V's are really competing with ARM based microcontro= llers for embedded systems. I don't find them interesting, though I have a = couple sample boards with 32 bit RISC-V cores).

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=  

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A random guess on my part: even consumer = routers will be moving to 64-bit processor designs in the next couple years= . That's because the price difference is getting quite small, as a percenta= ge of total product cost, and because it is hard to buy "small memory addre= ss space" DIMMs. I could be wrong, but extrapolation from today's trends su= ggests that is more likely than not.

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On Friday, Novemb= er 26, 2021 3:02pm, "Dave Taht" <dave.taht@gmail.com> said:

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> has = anyone tried the latest generations of risc-v?
>
> https:/= /linuxgizmos.com/17-sbc-runs-linux-on-allwinner-d1-risc-v-soc/
> > --
> I tried to build a better future, a few times:
&= gt; https://wayforward.archive.org/?site=3Dhttps%3A%2F%2Fwww.icei.org
= >
> Dave T=C3=A4ht CEO, TekLibre, LLC
> _______________= ________________________________
> Cerowrt-devel mailing list
= > Cerowrt-devel@lists.bufferbloat.net
> https://lists.bufferbloa= t.net/listinfo/cerowrt-devel
>

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