From: John Crispin <blogic@openwrt.org>
To: David Woodhouse <dwmw2@infradead.org>
Cc: bloat-devel <bloat-devel@lists.bufferbloat.net>,
"codel@lists.bufferbloat.net" <codel@lists.bufferbloat.net>,
"cerowrt-devel@lists.bufferbloat.net"
<cerowrt-devel@lists.bufferbloat.net>
Subject: Re: [Cerowrt-devel] [Codel] hardware hacking on fq_codel in FPGA form at 10GigE
Date: Fri, 21 Dec 2012 22:56:51 +0100 [thread overview]
Message-ID: <50D4DB23.1010306@openwrt.org> (raw)
In-Reply-To: <1356126843.2420.35.camel@shinybook.infradead.org>
> So the ATM driver would have to go out of its way to screw you over¹.
John?
the lantiq atm/dsl drivers use a dma ring to push packets from the atm
layer to the dsl modem core. this ring needs to be 2 packets big as a
minimum to have the hardware work. however, using software we can make
sure that only 1 packet at a tim eis inside the ring. this is what my
current dirty hack does.
> Btw, I'm looking at ways to *make* BQL on the PPP netdev work
properly, tracking packets all the way to the wire even when it's PPPoA,
PPPoE(oA), L2TP or whatever.
yay :)
next prev parent reply other threads:[~2012-12-21 21:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <dave.taht@gmail.com>
2012-12-20 7:28 ` [Cerowrt-devel] " Dave Taht
2012-12-20 8:17 ` Hal Murray
2012-12-20 8:27 ` Jonathan Morton
2012-12-20 9:51 ` Hal Murray
2012-12-20 9:13 ` Dave Taht
2012-12-20 9:26 ` Dave Taht
2012-12-20 10:32 ` Hal Murray
2012-12-20 13:53 ` dpreed
2012-12-20 14:18 ` Dave Taht
2012-12-20 15:05 ` Dave Taht
2012-12-21 12:34 ` Dave Taht
2012-12-21 17:48 ` dpreed
2012-12-21 18:14 ` Jim Gettys
2012-12-21 18:25 ` dpreed
2012-12-21 18:45 ` Jim Gettys
2012-12-21 19:34 ` dpreed
2012-12-21 19:42 ` Jim Gettys
2012-12-21 21:54 ` [Cerowrt-devel] [Codel] " David Woodhouse
2012-12-21 21:56 ` John Crispin [this message]
2012-12-21 22:08 ` David Woodhouse
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