From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lb0-x229.google.com (mail-lb0-x229.google.com [IPv6:2a00:1450:4010:c04::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id 53E3E3B2D2; Tue, 15 Mar 2016 05:38:47 -0400 (EDT) Received: by mail-lb0-x229.google.com with SMTP id k12so14658440lbb.1; Tue, 15 Mar 2016 02:38:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:subject:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to; bh=8DzbiD3YZart7GP1fbrdw4kD05sDQZg207PP820+Y6U=; b=pW0kAHfM07Lg86YDEJADJgX4fwifCYKpFigI3Plkwc6B7n7aOu1j0SPLUt911wG23t +PCrxHKV9iVR5YBHxMuj9yrFqsVE4f8Ez9EG3k4DQPtdH+O8Sbes/m/LviREELJZju4C QiewgKXo5jnyYIiwHEK7o71+uN/A5ShwHuUGzzOFePZ8kYKajsaWMwo1SGZb8solozX2 UvKPcmkdM7En05DvnL8sesQ7Bl74w8bGNXnnBsg9rzdjA4exbTHkQ1Q/9YTg/XQ1py29 AZpcbkqxWwrZYdZrcrdls69BXU3Yp8iyzyhSsDdz6V4KEAJ7eTZtNfLNdnN/EqA+Cy+v RX0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:subject:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to; bh=8DzbiD3YZart7GP1fbrdw4kD05sDQZg207PP820+Y6U=; b=TVUB/CC8veJXS9JUKa7zdMn0JLBynn493R+FuIOqastn8Cf7qXDwfnOA0bLzR3UV9N qTsz89nG3uMPpDBFGOuXN8KJsQnJNLH4MYpa8S9MHJM4+SXTBTXLOgFdhdlFtXZwUvtI cOXMaltYkkvDznYOBjVbR9z1qkLnQpKQ150sbRcDNd6Zx65RrFwDvi3m0/7Z3aHBvTfA 3WC0rDTigc/2ePsnATX98wkcvyntKt4AFrdcxE3bsfV38iH4bZao2TT/0w9yJjcE67LO +RrUzgUnMTgkiZ/BkHSaVgF6+8fYsO7kQ9g9Jb09bZrCArIqj/tIYEsObH7c3xojfHwq okxA== X-Gm-Message-State: AD7BkJJsSU075PPZfRyeHvdMW7O5mTR6zUVtL80wsdsl8vjBYjfldtQmG27Bfc1MzoKTFw== X-Received: by 10.25.208.143 with SMTP id h137mr7397093lfg.110.1458034725950; Tue, 15 Mar 2016 02:38:45 -0700 (PDT) Received: from bass.home.chromatix.fi (37-33-67-252.bb.dnainternet.fi. [37.33.67.252]) by smtp.gmail.com with ESMTPSA id u10sm4142254lby.33.2016.03.15.02.38.44 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Mar 2016 02:38:45 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 9.2 \(3112\)) From: Jonathan Morton In-Reply-To: <1458013678.063414576@mobile.rackspace.com> Date: Tue, 15 Mar 2016 11:38:42 +0200 Cc: David Lang , make-wifi-fast@lists.bufferbloat.net, Wayne Workman , bufferbloat-fcc-discuss , cerowrt-devel@lists.bufferbloat.net Content-Transfer-Encoding: quoted-printable Message-Id: <8F195AF3-ED59-4DAC-8B71-D8214693DD24@gmail.com> References: <1458013678.063414576@mobile.rackspace.com> To: dpreed@reed.com X-Mailer: Apple Mail (2.3112) Subject: Re: [Cerowrt-devel] [Make-wifi-fast] [bufferbloat-fcc-discuss] arstechnica confirmstp-link router lockdown X-BeenThere: cerowrt-devel@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Development issues regarding the cerowrt test router project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Mar 2016 09:38:47 -0000 > On 15 Mar, 2016, at 05:47, dpreed@reed.com wrote: >=20 > SoCs often have multiple functional units on the same die. For radios = that allows for a pipeline. You can limit what an EPROM will accept with = a crypto signature. >=20 > This is common stuff. As an example of this, AMD=E2=80=99s APUs and GPUs require several = different firmware blobs to bring up their 3D capabilities. The = on-board BIOS supplies only what is necessary for basic SVGA framebuffer = mode, which the operating system can use as a stopgap until the drivers = are installed. In Linux, these firmware blobs are identified by the IP block=E2=80=99s = codename. Most APUs and GPUs require a SUMO or SUMO2 blob to bring up = the RAMDACs, and a separate GPU-specific blob (VERDE for my 7770) for = the graphics engine itself, which takes up a much larger portion of the = die. I=E2=80=99m not sure whether these blobs are signed in AMD=E2=80=99s = system, but they could be. Their APUs have a Cortex-A5 based =E2=80=9Csec= ure processor=E2=80=9D which could in principle be tied into the = firmware-loading process, and probably has its own secure ROM. A = Cortex-M microcontroller core and ROM to do the job on a GPU would be = tiny. - Jonathan Morton