* [Cerowrt-devel] amd ryzen embedded nucs
@ 2019-08-20 23:14 Dave Taht
2019-08-20 23:22 ` Luis E. Garcia
0 siblings, 1 reply; 5+ messages in thread
From: Dave Taht @ 2019-08-20 23:14 UTC (permalink / raw)
To: cerowrt-devel
since we run the apu2 out of cpu on inbound shaping, there are some
new ryzen boxes appearing. Here's one....
https://www.amd.com/system/files/documents/R1000-product-brief.pdf
http://asrock.pc.cdn.bitgravity.com/Download/e-catalog/iBOX-R1000.pdf
I don't know why it uses realtek ethernet as the soc has 10Gbit
capable ethernet onboard.
--
Dave Täht
CTO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-831-205-9740
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Cerowrt-devel] amd ryzen embedded nucs
2019-08-20 23:14 [Cerowrt-devel] amd ryzen embedded nucs Dave Taht
@ 2019-08-20 23:22 ` Luis E. Garcia
2019-08-20 23:30 ` Dave Taht
0 siblings, 1 reply; 5+ messages in thread
From: Luis E. Garcia @ 2019-08-20 23:22 UTC (permalink / raw)
To: Dave Taht; +Cc: cerowrt-devel
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Dave,
Have you upgraded the firmware on your apu2 boxes? The was a performance
issue that was fixed a few weeks back.
Regards,
Luis
On Tue, Aug 20, 2019 at 5:15 PM Dave Taht <dave.taht@gmail.com> wrote:
> since we run the apu2 out of cpu on inbound shaping, there are some
> new ryzen boxes appearing. Here's one....
>
> https://www.amd.com/system/files/documents/R1000-product-brief.pdf
>
> http://asrock.pc.cdn.bitgravity.com/Download/e-catalog/iBOX-R1000.pdf
>
> I don't know why it uses realtek ethernet as the soc has 10Gbit
> capable ethernet onboard.
>
> --
>
> Dave Täht
> CTO, TekLibre, LLC
> http://www.teklibre.com
> Tel: 1-831-205-9740
> _______________________________________________
> Cerowrt-devel mailing list
> Cerowrt-devel@lists.bufferbloat.net
> https://lists.bufferbloat.net/listinfo/cerowrt-devel
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Cerowrt-devel] amd ryzen embedded nucs
2019-08-20 23:22 ` Luis E. Garcia
@ 2019-08-20 23:30 ` Dave Taht
2019-08-20 23:33 ` Luis E. Garcia
0 siblings, 1 reply; 5+ messages in thread
From: Dave Taht @ 2019-08-20 23:30 UTC (permalink / raw)
To: Luis E. Garcia; +Cc: cerowrt-devel
On Tue, Aug 20, 2019 at 4:23 PM Luis E. Garcia <luis@bitamins.net> wrote:
>
> Dave,
> Have you upgraded the firmware on your apu2 boxes? The was a performance issue that was fixed a few weeks back.
"the firmware" - do you mean openwrt? or the bios? link?
I would be *delighted* to be able to shape inbound on those boxes to
nearly ~1gbit. On the other hand it would
run me out of motivation to try and make a quad core shaper work....
(not that I have a lot of motivation, since
it's been a year since I last tried, and it was pretty invasive....
I really liked the new "listification" work going on in mainline.
Still, my dream was to be rid of mirred entirely, and
to be able to do:
tc qdisc add dev eth0 ingress cake bandwidth X
or rather
tc qdisc add dev eth0 ingress mq bandwidth X
tc qdisc add dev eth0 ingress handle 1:1 cake
tc qdisc add dev eth0 ingress handle 1:2 cake
...
Which looked possible to fall out of that work (but haven't checked in a year)
> Regards,
> Luis
>
> On Tue, Aug 20, 2019 at 5:15 PM Dave Taht <dave.taht@gmail.com> wrote:
>>
>> since we run the apu2 out of cpu on inbound shaping, there are some
>> new ryzen boxes appearing. Here's one....
>>
>> https://www.amd.com/system/files/documents/R1000-product-brief.pdf
>>
>> http://asrock.pc.cdn.bitgravity.com/Download/e-catalog/iBOX-R1000.pdf
>>
>> I don't know why it uses realtek ethernet as the soc has 10Gbit
>> capable ethernet onboard.
>>
>> --
>>
>> Dave Täht
>> CTO, TekLibre, LLC
>> http://www.teklibre.com
>> Tel: 1-831-205-9740
>> _______________________________________________
>> Cerowrt-devel mailing list
>> Cerowrt-devel@lists.bufferbloat.net
>> https://lists.bufferbloat.net/listinfo/cerowrt-devel
--
Dave Täht
CTO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-831-205-9740
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Cerowrt-devel] amd ryzen embedded nucs
2019-08-20 23:30 ` Dave Taht
@ 2019-08-20 23:33 ` Luis E. Garcia
2019-08-21 0:52 ` Dave Taht
0 siblings, 1 reply; 5+ messages in thread
From: Luis E. Garcia @ 2019-08-20 23:33 UTC (permalink / raw)
To: Dave Taht; +Cc: cerowrt-devel
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The BIOS it seems that the CPU wasn’t able to use the speed boost in some
cases. Single thread performance is where you can see some of the
improvements of the fix.
L
On Tue, Aug 20, 2019 at 5:30 PM Dave Taht <dave.taht@gmail.com> wrote:
> On Tue, Aug 20, 2019 at 4:23 PM Luis E. Garcia <luis@bitamins.net> wrote:
> >
> > Dave,
> > Have you upgraded the firmware on your apu2 boxes? The was a performance
> issue that was fixed a few weeks back.
>
> "the firmware" - do you mean openwrt? or the bios? link?
>
> I would be *delighted* to be able to shape inbound on those boxes to
> nearly ~1gbit. On the other hand it would
> run me out of motivation to try and make a quad core shaper work....
> (not that I have a lot of motivation, since
> it's been a year since I last tried, and it was pretty invasive....
>
> I really liked the new "listification" work going on in mainline.
> Still, my dream was to be rid of mirred entirely, and
> to be able to do:
>
> tc qdisc add dev eth0 ingress cake bandwidth X
>
> or rather
>
> tc qdisc add dev eth0 ingress mq bandwidth X
> tc qdisc add dev eth0 ingress handle 1:1 cake
> tc qdisc add dev eth0 ingress handle 1:2 cake
> ...
>
> Which looked possible to fall out of that work (but haven't checked in a
> year)
>
>
> > Regards,
> > Luis
> >
> > On Tue, Aug 20, 2019 at 5:15 PM Dave Taht <dave.taht@gmail.com> wrote:
> >>
> >> since we run the apu2 out of cpu on inbound shaping, there are some
> >> new ryzen boxes appearing. Here's one....
> >>
> >> https://www.amd.com/system/files/documents/R1000-product-brief.pdf
> >>
> >> http://asrock.pc.cdn.bitgravity.com/Download/e-catalog/iBOX-R1000.pdf
> >>
> >> I don't know why it uses realtek ethernet as the soc has 10Gbit
> >> capable ethernet onboard.
> >>
> >> --
> >>
> >> Dave Täht
> >> CTO, TekLibre, LLC
> >> http://www.teklibre.com
> >> Tel: 1-831-205-9740
> >> _______________________________________________
> >> Cerowrt-devel mailing list
> >> Cerowrt-devel@lists.bufferbloat.net
> >> https://lists.bufferbloat.net/listinfo/cerowrt-devel
>
>
>
> --
>
> Dave Täht
> CTO, TekLibre, LLC
> http://www.teklibre.com
> Tel: 1-831-205-9740
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Cerowrt-devel] amd ryzen embedded nucs
2019-08-20 23:33 ` Luis E. Garcia
@ 2019-08-21 0:52 ` Dave Taht
0 siblings, 0 replies; 5+ messages in thread
From: Dave Taht @ 2019-08-21 0:52 UTC (permalink / raw)
To: Luis E. Garcia; +Cc: cerowrt-devel
On Tue, Aug 20, 2019 at 4:33 PM Luis E. Garcia <luis@bitamins.net> wrote:
>
> The BIOS it seems that the CPU wasn’t able to use the speed boost in some cases. Single thread performance is where you can see some of the improvements of the fix.
Ah, this...
https://blog.3mdeb.com/2019/2019-02-14-enabling-cpb-on-pcengines-apu2/
And:
https://pcengines.github.io/
http://pcengines.ch/howto.htm#bios
Reflashing the bios needs a serial cable, which I'll dig up. Thx for the steer!
> L
>
> On Tue, Aug 20, 2019 at 5:30 PM Dave Taht <dave.taht@gmail.com> wrote:
>>
>> On Tue, Aug 20, 2019 at 4:23 PM Luis E. Garcia <luis@bitamins.net> wrote:
>> >
>> > Dave,
>> > Have you upgraded the firmware on your apu2 boxes? The was a performance issue that was fixed a few weeks back.
>>
>> "the firmware" - do you mean openwrt? or the bios? link?
>>
>> I would be *delighted* to be able to shape inbound on those boxes to
>> nearly ~1gbit. On the other hand it would
>> run me out of motivation to try and make a quad core shaper work....
>> (not that I have a lot of motivation, since
>> it's been a year since I last tried, and it was pretty invasive....
>>
>> I really liked the new "listification" work going on in mainline.
>> Still, my dream was to be rid of mirred entirely, and
>> to be able to do:
>>
>> tc qdisc add dev eth0 ingress cake bandwidth X
>>
>> or rather
>>
>> tc qdisc add dev eth0 ingress mq bandwidth X
>> tc qdisc add dev eth0 ingress handle 1:1 cake
>> tc qdisc add dev eth0 ingress handle 1:2 cake
>> ...
>>
>> Which looked possible to fall out of that work (but haven't checked in a year)
>>
>>
>> > Regards,
>> > Luis
>> >
>> > On Tue, Aug 20, 2019 at 5:15 PM Dave Taht <dave.taht@gmail.com> wrote:
>> >>
>> >> since we run the apu2 out of cpu on inbound shaping, there are some
>> >> new ryzen boxes appearing. Here's one....
>> >>
>> >> https://www.amd.com/system/files/documents/R1000-product-brief.pdf
>> >>
>> >> http://asrock.pc.cdn.bitgravity.com/Download/e-catalog/iBOX-R1000.pdf
>> >>
>> >> I don't know why it uses realtek ethernet as the soc has 10Gbit
>> >> capable ethernet onboard.
>> >>
>> >> --
>> >>
>> >> Dave Täht
>> >> CTO, TekLibre, LLC
>> >> http://www.teklibre.com
>> >> Tel: 1-831-205-9740
>> >> _______________________________________________
>> >> Cerowrt-devel mailing list
>> >> Cerowrt-devel@lists.bufferbloat.net
>> >> https://lists.bufferbloat.net/listinfo/cerowrt-devel
>>
>>
>>
>> --
>>
>> Dave Täht
>> CTO, TekLibre, LLC
>> http://www.teklibre.com
>> Tel: 1-831-205-9740
--
Dave Täht
CTO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-831-205-9740
^ permalink raw reply [flat|nested] 5+ messages in thread
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2019-08-20 23:33 ` Luis E. Garcia
2019-08-21 0:52 ` Dave Taht
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