From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ie0-x22b.google.com (mail-ie0-x22b.google.com [IPv6:2607:f8b0:4001:c03::22b]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by huchra.bufferbloat.net (Postfix) with ESMTPS id D5BD0200628 for ; Mon, 27 May 2013 06:13:39 -0700 (PDT) Received: by mail-ie0-f171.google.com with SMTP id s9so576375iec.2 for ; Mon, 27 May 2013 06:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=NZwHENGkMsUwHsRLTzmMcDlIzuAyg8xwtc4pLwsljVo=; b=RvFCSo7FDlF4WxwcWrXLSwR2i3n+ttX+L2UtMXQGIg8n7ZpOQhPAziO4ztOfqTohYy +f73KOaiNxZZCIXVz4HW+AxvBza5hGcZxwlB3MUMyJ6D222QJcT/BeCz3LIeduEFEkxn YOCR5dIr9EE+3/IA2LkPEx7F1o3zE4c2bdcQfZDoSKknVi3S6E3mA4Z26iVLimc/PNhT wbG9hxOX6P3ZOVJ4jRngDn8gCBvw2y4pjUgT4Wo4xsrjdEjQeGVQpBMI02V3DocYkg/h SU1GG76lBy0WJRK82dJOxUOPY3LOYickeRUgssVBdQSCzqerlunHrTiCHx48oSoctFry VnBg== MIME-Version: 1.0 X-Received: by 10.50.120.4 with SMTP id ky4mr4647802igb.86.1369660418508; Mon, 27 May 2013 06:13:38 -0700 (PDT) Received: by 10.64.35.44 with HTTP; Mon, 27 May 2013 06:13:38 -0700 (PDT) In-Reply-To: References: Date: Mon, 27 May 2013 06:13:38 -0700 Message-ID: From: Dave Taht To: Lance Hepler Content-Type: multipart/alternative; boundary=047d7b8746d4b5521904ddb2ea83 Cc: cerowrt-devel@lists.bufferbloat.net Subject: Re: [Cerowrt-devel] tp-link 4300 evaluation X-BeenThere: cerowrt-devel@lists.bufferbloat.net X-Mailman-Version: 2.1.13 Precedence: list List-Id: Development issues regarding the cerowrt test router project List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 May 2013 13:13:40 -0000 --047d7b8746d4b5521904ddb2ea83 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On Sun, May 26, 2013 at 6:23 PM, Lance Hepler wrote: > That's tragic. I just picked up a Netgear WNDR4300 (openbox on sale at th= e > local Fry's) to see if I could hack up a CeroWrt clone on it. It seems to > be mostly the same hardware as the WNDR3700v4 and the TP-Link WDR43[01]0, > with things just wired up slightly differently. > > I'd be interested in your netperf testing setup. > The test we've been developing is called the rrul test. The prototype (which is working quite well is at: https://github.com/tohojo/netperf-wrapper I use the results in my talks a lot. > With the AR71xx chips going out of style, the AR934x series is probably > our best bet for readily consumer-available hardware with open-source > friendly SoCs. > It seems like it. But with MIPS Technologies effectively defunct the only real hope I have for architectural progress on that architecture would come from a licensee with chops. > (Maybe a Xilinx Zynq-based router funded through Kickstarter? =3D) > I am very, very, very, very impressed with the potential of the zynq. I have dreamed of having writable hardware that could access *virtual memory* - which the zynq can do!!! (at least theoretically) Aformentioned dream I've sadly held now for over two decades. but when I poured through the zynq documentation I saw that it had one port that could go through the vm subsystem and jumped for joy. Finally, something that could take hardware design out of the hands of the EEs (who tend to optimize for the wrong things) and back into userspace where real problems in real software can be offloaded easily, and solutions iterated in conjunction with the EEs and the huge mental and coding gap today between CS and EE closed again. I was happy when virtual memory became standard on everything (late 80s) but very unhappy when everyone writing socs (early 90s) put all the cool accelerators for various things where you could only easily get at them via a switch to kernel mode. The EEs missed the benefits of userspace and vm entirely until the zynq showed up (and it has twisted software design into moving things that shouldn't be in kernelspace into kernelspace) I fondly remember the days when software and hardware skills were intermixed, that you could soldier together a real computer, write some software, and add something else to it to make it do something useful... Wait... all that's happening now again with the pi, beaglebone, etc - ! (the maker movement is pretty awesome) but those devices are a tad underpowered for the kinds of things I'd like to be doing. An example of a highly parallizable task is implementing an echo canceller with a long tail. You kind of have to do this in userspace on something like a freeswitch, and switching to kernelspace to do it is a PITA for the very brief interval that doing echocan is useful... Anyway, I digress (amd is also unifying vm space with their cpu/graphics designs btw)... A big problem with the initial dev boards built around the zynq is they are built around two incompatible sets of ideas - one being that you want to do graphics and sound and the other being you want to do high speed wireless (and/or DSP processing), which drives the cost up. Not having both gigE ethernet ports brought out is currently a deal-killer for me. So there is certainly room to drop most of the extra stuff in the zedboard, design a new board around the zynq for a new-age cero router around it (8 ethernet phys, 2-3 of which being SFP+ and gpon capable), add pcie for 2 radios, pins to do software radio as development continues, arduino headers, and dunno, battery support? The zynq-7020 is the coolest darn chip I've seen in ages. (I haven't been this excited about a chip since the strongarm. I kind of expect, after fiddling with my zedboards more to find something to be disappointed in.) (I have a parallela board on order, there's an openwrt port for the zedboard in progress, and I've BQL'd the zynq kernel already, and looked over the verilog for various ethernet chips to see how to move fq_codel directly into hardware, etc, etc. ) When I get back to california next week, I hope to find someone to talk to at Xilinx (suggestions, anyone?) about getting started on getting a board like that designed. http://www.parallella.org/'s initial board bringup is going very well... > This is all pretty new stuff, perhaps some more performance can be gleane= d > by tuning the compiler optimizations (-march=3D74Kc?), > Usually compiler options are not worth all that much. I didn't much care for the deep pipeline in this design either... and perhaps the AR8327N switch chip could use someone poking about its > driver > It's a switch, how bad can it be? > (the rtl8366s in the WNDR3800 _has_ been around a while). Although, in al= l > honesty, the omission of that second ethernet port could just be a coffin > nail. > I don't know why performance is as bad as it is in my initial benchmark. We spent a lot of time oprofiling things in the early days of the ar7xx, I will take a harder look as I get time this week. I'm not writing it off, just was very disappointed in what I got initially. The other deal killer for this platform is that 16MB of flash is a requirement for cerowrt's boatload of test tools. > Helpfully, the WNDR4300 has 128MB of NAND flash, as does the WNDR3700v4. > So compiling a full CeroWRT distribution shouldn't be a problem. The fixe= th > script will need to be changed, but not much else. > ah, you've looked deeply at the boot phase. Applause! Bringing up this board seems easy once the flash issues are resolved... but that requires a level of time (with a scope probably) that I am personally unwilling to invest right now. I think there are people on the problem, tho... > > Lance > > PS: I apologize if this post doesn't show up where it should. I joined th= e > list to respond to this email, as such I naturally didn't receive the > original.. > > _______________________________________________ > Cerowrt-devel mailing list > Cerowrt-devel@lists.bufferbloat.net > https://lists.bufferbloat.net/listinfo/cerowrt-devel > > --=20 Dave T=E4ht Fixing bufferbloat with cerowrt: http://www.teklibre.com/cerowrt/subscribe.html --047d7b8746d4b5521904ddb2ea83 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable

On Sun, May 26, 2013 at 6:23 PM, Lance H= epler <nlhepler@gmail.com> wrote:
That's tragic. I just picked up a Netgear WNDR4300 (openbox on sal= e at the local Fry's) to see if I could hack up a CeroWrt clone on it. = It seems to be mostly the same hardware as the WNDR3700v4 and the TP-Link W= DR43[01]0, with things just wired up slightly differently.

I'd be interested in your netperf testing setup.
<= /div>

The test we've been developing is called the= rrul test. The prototype (which is working quite well is at:

https://github.com/tohojo/n= etperf-wrapper

I use the results in my talks a lot.
=A0
With the AR71xx chips going out of styl= e, the AR934x series is probably our best bet for readily consumer-availabl= e hardware with open-source friendly SoCs.

It seems like it. But with MIPS Technologies ef= fectively defunct the only real hope I have for architectural progress on t= hat architecture would come from a licensee with chops.
=A0
(Maybe a Xilinx Zynq-based router funded through Kick= starter? =3D)

I am very, very, very, very impressed with the = potential of the zynq.

I have dreamed of having writable hardware t= hat could access *virtual memory* - which the zynq=A0 can do!!! (at least t= heoretically)

Aformentioned dream I've sadly held now for over two decades.
<= br>but when I poured through the zynq documentation I saw that it had one p= ort that could go through the vm subsystem and jumped for joy.

Final= ly, something that could take hardware design out of the hands of the EEs (= who tend to optimize for the wrong things) and back into userspace where re= al problems in real software can be offloaded easily, and solutions iterate= d in conjunction with the EEs and the huge mental and coding gap today betw= een CS and EE closed again.

I was happy when virtual memory became standard on everything (late 80s= ) but very unhappy when everyone writing socs (early 90s) put all the cool = accelerators for various things where you could only easily get at them via= a switch to kernel mode. The EEs missed the benefits of userspace and vm e= ntirely until the zynq showed up (and it has twisted software design into m= oving things that shouldn't be in kernelspace into kernelspace)

I fondly remember the days when software and hardware skills were inter= mixed, that you could soldier together a real computer, write some software= , and add something else to it to make it do something useful...

Wait... all that's happening now again with the pi, beaglebone, etc - != (the maker movement is pretty awesome) but those devices are a tad underpo= wered for the kinds of things I'd like to be doing.

An example = of a highly parallizable task is implementing an echo canceller with a long= tail. You kind of have to do this in userspace on something like a freeswi= tch, and switching to kernelspace to do it is a PITA for the very brief int= erval that doing echocan is useful...

Anyway, I digress (amd is also unifying vm space with their cpu/graphic= s designs btw)...
=A0
A big problem with the initial dev boards buil= t around the zynq is they are built around two incompatible sets of ideas -= one being that you want to do graphics and sound and the other being you w= ant to do high speed wireless (and/or DSP processing), which drives the cos= t up. Not having both gigE ethernet ports brought out is currently a deal-k= iller for me.

So there is certainly room to drop most of the extra stuff in the zedbo= ard, design a new board around the zynq for a new-age cero router around it= (8 ethernet phys, 2-3 of which being SFP+ and gpon capable), add pcie for = 2 radios, pins to do software radio as development continues, arduino heade= rs, and dunno, battery support?

The zynq-7020 is the coolest darn chip I've seen in ages. (I haven&= #39;t been this excited about a chip since the strongarm. I kind of expect,= after fiddling with my zedboards more to find something to be disappointed= in.)

(I have a parallela board on order, there's an openwrt port for the= =20 zedboard in progress, and I've BQL'd the zynq kernel already, and l= ooked over the verilog for various ethernet chips to see how to move fq_codel directly into hardware, etc, etc. )

When I get back to california n= ext week, I hope to find someone to talk to at Xilinx (suggestions, anyone?= ) about getting started on getting a board like that designed.

http://www.parallella.org/'= ;s initial board bringup is going very well...


This is all pretty new stuff, perhaps some more perform= ance can be gleaned by tuning the compiler optimizations (-march=3D74Kc?), =

Usually compiler options are not worth al= l that much. I didn't much care for the deep pipeline in this design ei= ther...

and perhaps = the AR8327N switch chip could use someone poking about its driver

It's a switch, how bad can it be?
=A0
(the rtl8366s in the = WNDR3800 _has_ been around a while). Although, in all honesty, the omission= of that second ethernet port could just be a coffin nail.

I don't know why performance is as bad as i= t is in my initial benchmark.

We spent a lot of time oprofiling thin= gs in the early days of the ar7xx, I will take a harder look as I get time = this week. I'm not writing it off, just was very disappointed in what I= got initially. The other deal killer for this platform is that 16MB of fla= sh is a requirement for cerowrt's boatload of test tools.


Helpfully, the WNDR4300 has 128MB of NAND flash, as doe= s the WNDR3700v4. So compiling a full CeroWRT distribution shouldn't be= a problem. The fixeth script will need to be changed, but not much else.

ah, you've looked deeply at the boot phase.= Applause! Bringing up this board seems easy once the flash issues are reso= lved... but that requires a level of time (with a scope probably) that I am= personally unwilling to invest right now. I think there are people on the = problem, tho...

=A0

Lance

PS: I apol= ogize if this post doesn't show up where it should. I joined the list t= o respond to this email, as such I naturally didn't receive the origina= l..

_______________________________________________
Cerowrt-devel mailing list
Ce= rowrt-devel@lists.bufferbloat.net
https://lists.bufferbloat.net/listinfo/cerowrt-devel




--
Dave T=E4ht

= Fixing bufferbloat with cerowrt: http://www.teklibre.com/cerowrt/subscrib= e.html=20 --047d7b8746d4b5521904ddb2ea83--