[Ecn-sane] FQ in the core

[Dave Taht <dave.taht@gmail.com>]

I don't really have time to debate this today.

Since you forked this conversation back to FQ I need to state a few things.

1) SCE is (we think) compatible with existing single queue AQMs. CE
should not be exerted in this case, just drop. Note that this is also
what L4S wants to do with the "normal" queue (I refuse to call it
classic).

2) SCE is optional. A transport that has a more agressive behavior,
like dctcp, should fall back to being tcp-friendly if it
sees no SCE marks and only CE or drop.

3) At 100Gbit speeds some form of multi-queue oft seems needed. (and
this is in part why folk want to relax ordering requirements). So some
form of multiple queuing is generally the case. At the higher speeds,
DC's usually overprovision anyway.

4) The biggest cpu overhead for any of this stuff is per-tenant (in
the dc) or per customer shaping. This benefits a lot from a hardware
assist. (see senic). I've done quite a bit of DC work in the past 2
years (rather than home routers), and have had a hard look at the
underlying substrates for a few multi-tenant implementations....

4) "dualq" hasn't tried to address the fact that most 10Gbit and
higher cards have 8 or more hardware queues in the first place.

5) Companies like preseem are shipping transparent bridges that do
fq_codel/cake on customer traffic.

I've long been in periodic negotions with makers of "big iron" like,
for example, the new 128 core huwei box and others I cannot talk about
at the moment, to get so far as an existence proof.

So I'd like to kill the meme that SCE requires FQ, at least, for now,
until after we do more tests.

As for FQ everywhere, well, I'd like that, but it's not needed in
devices that already have sufficient multiplexing.





On Mon, Mar 25, 2019 at 8:16 AM Mikael Abrahamsson <swmike@swm.pp.se> wrote:
>
> On Sun, 24 Mar 2019, Sebastian Moeller wrote:
>
> > From my layman's perspective this is the the killer argument against the
> > dualQ approach and for fair-queueing, IMHO only fq will be able to
>
> Do people on this email list think we're trying to trick you when we're
> saying that FQ won't be available anytime soon on a lot of platforms that
> need this kind of AQM?
>
> Since there is always demand for implementations, can we get an ASIC/NPU
> implementation of FQ_CODEL done by someone who claims it's no problem?
>
> Personally I believe we need both. FQ is obviously superior to anything
> else most of the time, but FQ is not making itself into the kind of
> devices it needs to get into for the bufferbloat situation to improve, so
> now what?
>
> Claiming to have a superior solution that is too expensive to go into
> relevant devices, is that proposal still relevant as an alternative to a
> different solution that actually is making itself into silicon?
>
> Again, FQ superior, but what what good is it if it's not being used?
>
> We need to have this discussion and come up with a joint understanding of
> the world, otherwise we're never going to get anywhere.
>
> --
> Mikael Abrahamsson    email: swmike@swm.pp.se
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-- 

Dave Täht
CTO, TekLibre, LLC
http://www.teklibre.com
Tel: 1-831-205-9740