From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.bufferbloat.net (Postfix) with ESMTPS id 8D7F03B29D for ; Fri, 9 Feb 2024 20:17:44 -0500 (EST) Received: by mail-pj1-x102c.google.com with SMTP id 98e67ed59e1d1-296717ccc2aso1926428a91.1 for ; Fri, 09 Feb 2024 17:17:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1707527863; x=1708132663; darn=lists.bufferbloat.net; h=content-transfer-encoding:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=84s1hNWtGQRH/JGJm8tLqrUIC044u3WF6eEOhN9Yz2c=; b=PD3OgOXQZDMcGk9h/XgZS17ZvkKlcvpE3DBcLY/3HLf1D1mXHL8gzu2rczuLFl7DN+ so4eTeRbrvRL6B3zm60UT4qxM1AIrBNY4c6ZNWsG6kLKaVYq99VJ7tgLTRGPuoGNCkAJ 4/upxczapb9Hf++yJA0KPmDpvCtVokeIWwN3omjJr2WlQja0Qn0jdNF5eOy4Pptd+rt+ xk5MXIEZ6JYHqV875HR88s+NOzukuXjcM9zbyAwQY0EWStQ6tkFbGGT8g3zBpVOGnYmW xPQOGpmNe6QbBCEp+u51pDmgll8tcDhqgGjGfoj0M7qkFsqhfjLzeaO10zyafjsWDuXM MRGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707527863; x=1708132663; h=content-transfer-encoding:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=84s1hNWtGQRH/JGJm8tLqrUIC044u3WF6eEOhN9Yz2c=; b=BvMhN3pTcJWiEwjLyJrY7JEXjU4niv9Hews+Pgv+sSfQhOBLm4KxmVVLCru5+M7FkL Ns1MhQlnWt4lXrCS78vK6Nd7M0ne3oXzUAWldsBsGdqqEyBogMqu8tjqxW+OHfG2mwVm kBFB3Vpu+A3WOMSuS77PKbd2td6eCFqxMjNsR1a6WXbIA1xVu4a+UwMmt1rYil8smDL9 /SIDxd94lt8AsB0NYF8uIzAb3eZq4uaeACoGIj55aZAOZcbHffnneEXGRWorl8LbUh3b XAwPHnv5MrScRG8hoBROzEt+iI3Bw7cU7AxyeG6kG7OIdFd+eGH3jvSWBHtSCGYAOFAT ys6w== X-Gm-Message-State: AOJu0YyISQjeX4Agw68NO0ptTsqfLn/ZdMty7DDGUqRoki/+7XGAqFGb fIVpqZLHiyLLjBoPqXn79p0RHq+/Xc4U1fGSUiDcy/8Npq0ZvFdRaJLZJJYuZtDtLrHOf+1Yclu 0iimT33viQcM2g94A/wEPaPNjyUQeyUlR X-Google-Smtp-Source: AGHT+IESQ0AbCD8lMiOg5snt6mgV8t23UIIreQQPY0VyVJNHxtn7RIftETPB/fLPi4Ly2MF1XKdX7L2N0gcy2vscJh4= X-Received: by 2002:a17:90a:e643:b0:295:f706:add5 with SMTP id ep3-20020a17090ae64300b00295f706add5mr984338pjb.24.1707527862824; Fri, 09 Feb 2024 17:17:42 -0800 (PST) MIME-Version: 1.0 References: <64b65025-792c-43c9-8ae5-22030264e374@gmail.com> In-Reply-To: <64b65025-792c-43c9-8ae5-22030264e374@gmail.com> From: Dave Taht Date: Fri, 9 Feb 2024 20:17:30 -0500 Message-ID: To: libreqos Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: [LibreQoS] Fwd: Kernel Module r8169 and the Realtek 8126 PCIe 5 G/bps WIRED ethernet adapter X-BeenThere: libreqos@lists.bufferbloat.net X-Mailman-Version: 2.1.20 Precedence: list List-Id: Many ISPs need the kinds of quality shaping cake can do List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 10 Feb 2024 01:17:44 -0000 I had no idea 5Gbps ethernet on the motherboard was a thing. ---------- Forwarded message --------- From: Joe Salmeri Date: Tue, Jan 30, 2024 at 11:43=E2=80=AFAM Subject: Re: Kernel Module r8169 and the Realtek 8126 PCIe 5 G/bps WIRED ethernet adapter To: Heiner Kallweit , netdev@vger.kernel.org On 1/29/24 17:19, Heiner Kallweit wrote: > On 29.01.2024 19:31, Joe Salmeri wrote: >> Hi, >> >> I recently built a new PC using the Asus z790 Maximus Formula motherboar= d. >> >> The z790 Formula uses the Realtek 8126 PCIe 5 G/bps WIRED ethernet adapt= er. >> >> I am using openSUSE Tumbleweed build 20231228 with kernel 6.6.7-1 >> >> There does not seem to be a driver for the Realtek 8126. >> >> Here is the device info from "lspci | grep -i net" >> >> 04:00.0 Network controller: Intel Corporation Device 272b (rev 1a) >> 05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device= 8126 (rev 01) >> >> So it is detects the 8126 just fine it just doesn't have a driver for it= . >> >> I checked realtek.com and found >> >> https://www.realtek.com/en/component/zoo/category/network-interface-cont= rollers-10-100-1000m-gigabit-ethernet-pci-express-software >> >> The download link still says 8125 ( and kernel 6.4 ), but I compiled the= source and since I have Secure boot enabled, I signed the >> resulting module file. >> >> The driver loads successfully and I now have wired networking and it has= worked flawlessly for the last 2 months. >> >> I submitted a bug in Tumbleweed requesting support for the Realtek 8126 = be added and was informed that the r8169 kernel module >> is what is used to support the older Realtek 8125 device. >> >> Since the drivers from Realtek seem to support both the r8125 and my new= er r8126, the Tumbleweed support prepared a test >> kernel 6.6.7-1 for me where they added the PCI entry for the r8126 and I= installed and tested it out. >> >> Although it does now load the r8169 module with their test kernel, the r= 8126 device still does not work. >> >> The only 2 lines that reference the r8169 in the dmesg log are these 2 l= ines: >> >> [ 3.237151] r8169 0000:05:00.0: enabling device (0000 -> 0003) >> [ 3.237289] r8169 0000:05:00.0: error -ENODEV: unknown chip XID 649, = contact r8169 maintainers (see MAINTAINERS file) >> >> I reported the results of the test to Tumbleweed support and they said t= hat additional tweaks will be needed for the r8169 >> module to support the r8126 wired network adapter and thatn I should req= uest to you to add support. >> >> The details of the openSUSE bug report on the issue can be found here: >> >> https://bugzilla.suse.com/show_bug.cgi?id=3D1217417 >> >> Could we please get support added for the r8126 - Realtek 8126 PCIe 5 G/= bps WIRED ethernet adapter added to the kernel ? >> > Thanks for the report. Actually it's not a bug report but a feature reque= st. > Realtek provides no information about new chip versions and no data sheet= s, therefore the only > source of information is the r8125 vendor driver. Each chip requires a lo= t of version-specific > handling, therefore the first steps you described go in the right directi= on, but are by far not > sufficient. Patch below applies on linux-next, please test whether it wor= ks for you, and report back. > > Disclaimer: > r8125 references a firmware file that hasn't been provided to linux-firmw= are by Realtek yet. > Typically the firmware files tune PHY parameters to deal with compatibili= ty issues. > In addition r8125 includes a lot of PHY tuning for RTL8126A. > Depending on cabling, link partner etc. the patch may work for you, or yo= u may experience > link instability or worst case no link at all. > > Maybe RTL8126a also has a new integrated PHY version that isn't supported= yet. > In this case the driver will complain with the following message and I'd = need the PHY ID. > "no dedicated PHY driver found for PHY ID xxx" Thanks very much for your quick response. I forward your patch to the openSUSE people I have been working and they prepared a new test kernel 6.7.2 with the patches for for me to test. I just installed the test kernel provided with the patches but just as you expected it complains about no dedicated PHY driver found. Here is the dmesg | grep 8169 output with the information you requested [ 3.176753] r8169 0000:05:00.0: enabling device (0000 -> 0003) [ 3.184887] r8169 0000:05:00.0: no dedicated PHY driver found for PHY ID 0x001cc862, maybe realtek.ko needs to be added to initramfs? [ 3.184912] r8169: probe of 0000:05:00.0 failed with error -49 Thank you for your efforts. Please let me know if you need any further details. > --- > drivers/net/ethernet/realtek/r8169.h | 1 + > drivers/net/ethernet/realtek/r8169_main.c | 91 +++++++++++++++---- > .../net/ethernet/realtek/r8169_phy_config.c | 1 + > 3 files changed, 77 insertions(+), 16 deletions(-) > > diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/= realtek/r8169.h > index 81567fcf3..c921456ed 100644 > --- a/drivers/net/ethernet/realtek/r8169.h > +++ b/drivers/net/ethernet/realtek/r8169.h > @@ -68,6 +68,7 @@ enum mac_version { > /* support for RTL_GIGA_MAC_VER_60 has been removed */ > RTL_GIGA_MAC_VER_61, > RTL_GIGA_MAC_VER_63, > + RTL_GIGA_MAC_VER_65, > RTL_GIGA_MAC_NONE > }; > > diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethe= rnet/realtek/r8169_main.c > index e0abdbcfa..ebf7a3b13 100644 > --- a/drivers/net/ethernet/realtek/r8169_main.c > +++ b/drivers/net/ethernet/realtek/r8169_main.c > @@ -55,6 +55,7 @@ > #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw" > #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw" > #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw" > +#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw" > > #define TX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimi= ted */ > #define InterFrameGap 0x03 /* 3 means InterFrameGap =3D the sh= ortest one */ > @@ -136,6 +137,7 @@ static const struct { > [RTL_GIGA_MAC_VER_61] =3D {"RTL8125A", FIRMWARE_8125A_3}= , > /* reserve 62 for CFG_METHOD_4 in the vendor driver */ > [RTL_GIGA_MAC_VER_63] =3D {"RTL8125B", FIRMWARE_8125B_2}= , > + [RTL_GIGA_MAC_VER_65] =3D {"RTL8126A", FIRMWARE_8126A_2}= , > }; > > static const struct pci_device_id rtl8169_pci_tbl[] =3D { > @@ -158,6 +160,7 @@ static const struct pci_device_id rtl8169_pci_tbl[] = =3D { > { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0024 }, > { 0x0001, 0x8168, PCI_ANY_ID, 0x2410 }, > { PCI_VDEVICE(REALTEK, 0x8125) }, > + { PCI_VDEVICE(REALTEK, 0x8126) }, > { PCI_VDEVICE(REALTEK, 0x3000) }, > {} > }; > @@ -327,8 +330,12 @@ enum rtl8168_registers { > }; > > enum rtl8125_registers { > + INT_CFG0_8125 =3D 0x34, > +#define INT_CFG0_ENABLE_8125 BIT(0) > +#define INT_CFG0_CLKREQEN BIT(3) > IntrMask_8125 =3D 0x38, > IntrStatus_8125 =3D 0x3c, > + INT_CFG1_8125 =3D 0x7a, > TxPoll_8125 =3D 0x90, > MAC0_BKP =3D 0x19e0, > EEE_TXIDLE_TIMER_8125 =3D 0x6048, > @@ -1139,7 +1146,7 @@ static void rtl_writephy(struct rtl8169_private *tp= , int location, int val) > case RTL_GIGA_MAC_VER_31: > r8168dp_2_mdio_write(tp, location, val); > break; > - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: > r8168g_mdio_write(tp, location, val); > break; > default: > @@ -1154,7 +1161,7 @@ static int rtl_readphy(struct rtl8169_private *tp, = int location) > case RTL_GIGA_MAC_VER_28: > case RTL_GIGA_MAC_VER_31: > return r8168dp_2_mdio_read(tp, location); > - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: > return r8168g_mdio_read(tp, location); > default: > return r8169_mdio_read(tp, location); > @@ -1507,7 +1514,7 @@ static void __rtl8169_set_wol(struct rtl8169_privat= e *tp, u32 wolopts) > break; > case RTL_GIGA_MAC_VER_34: > case RTL_GIGA_MAC_VER_37: > - case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_65: > if (wolopts) > rtl_mod_config2(tp, 0, PME_SIGNAL); > else > @@ -2073,6 +2080,9 @@ static enum mac_version rtl8169_get_mac_version(u16= xid, bool gmii) > u16 val; > enum mac_version ver; > } mac_info[] =3D { > + /* 8126A family. */ > + { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 }, > + > /* 8125B family. */ > { 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 }, > > @@ -2343,6 +2353,7 @@ static void rtl_init_rxcfg(struct rtl8169_private *= tp) > RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST); > break; > case RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_65: > RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST | > RX_PAUSE_SLOT_ON); > break; > @@ -2772,7 +2783,7 @@ static void rtl_enable_exit_l1(struct rtl8169_priva= te *tp) > case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38: > rtl_eri_set_bits(tp, 0xd4, 0x0c00); > break; > - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: > r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80); > break; > default: > @@ -2786,7 +2797,7 @@ static void rtl_disable_exit_l1(struct rtl8169_priv= ate *tp) > case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38: > rtl_eri_clear_bits(tp, 0xd4, 0x1f00); > break; > - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_65: > r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0); > break; > default: > @@ -2796,6 +2807,8 @@ static void rtl_disable_exit_l1(struct rtl8169_priv= ate *tp) > > static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool = enable) > { > + u8 val8; > + > if (tp->mac_version < RTL_GIGA_MAC_VER_32) > return; > > @@ -2809,11 +2822,19 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8= 169_private *tp, bool enable) > return; > > rtl_mod_config5(tp, 0, ASPM_en); > - rtl_mod_config2(tp, 0, ClkReqEn); > + switch (tp->mac_version) { > + case RTL_GIGA_MAC_VER_65: > + val8 =3D RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKRE= QEN; > + RTL_W8(tp, INT_CFG0_8125, val8); > + break; > + default: > + rtl_mod_config2(tp, 0, ClkReqEn); > + break; > + } > > switch (tp->mac_version) { > case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: > - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: > /* reset ephy tx/rx disable timer */ > r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0); > /* chip can trigger L1.2 */ > @@ -2825,14 +2846,22 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8= 169_private *tp, bool enable) > } else { > switch (tp->mac_version) { > case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48: > - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_65: > r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0); > break; > default: > break; > } > > - rtl_mod_config2(tp, ClkReqEn, 0); > + switch (tp->mac_version) { > + case RTL_GIGA_MAC_VER_65: > + val8 =3D RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKR= EQEN; > + RTL_W8(tp, INT_CFG0_8125, val8); > + break; > + default: > + rtl_mod_config2(tp, ClkReqEn, 0); > + break; > + } > rtl_mod_config5(tp, ASPM_en, 0); > } > } > @@ -3545,10 +3574,15 @@ static void rtl_hw_start_8125_common(struct rtl81= 69_private *tp) > /* disable new tx descriptor format */ > r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000); > > - if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_63) > + if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_65) > + RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02); > + > + if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_65) > + r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400); > + else if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_63) > r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200); > else > - r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400); > + r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0300); > > if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_63) > r8168_mac_ocp_modify(tp, 0xe63e, 0x0c30, 0x0000); > @@ -3561,6 +3595,10 @@ static void rtl_hw_start_8125_common(struct rtl816= 9_private *tp) > r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030); > r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000); > r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001); > + if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_65) > + r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000); > + else > + r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000); > r8168_mac_ocp_modify(tp, 0xe0c0, 0x4f0f, 0x4403); > r8168_mac_ocp_modify(tp, 0xe052, 0x0080, 0x0068); > r8168_mac_ocp_modify(tp, 0xd430, 0x0fff, 0x047f); > @@ -3575,10 +3613,10 @@ static void rtl_hw_start_8125_common(struct rtl81= 69_private *tp) > > rtl_loop_wait_low(tp, &rtl_mac_ocp_e00e_cond, 1000, 10); > > - if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_63) > - rtl8125b_config_eee_mac(tp); > - else > + if (tp->mac_version =3D=3D RTL_GIGA_MAC_VER_61) > rtl8125a_config_eee_mac(tp); > + else > + rtl8125b_config_eee_mac(tp); > > rtl_disable_rxdvgate(tp); > } > @@ -3622,6 +3660,12 @@ static void rtl_hw_start_8125b(struct rtl8169_priv= ate *tp) > rtl_hw_start_8125_common(tp); > } > > +static void rtl_hw_start_8126a(struct rtl8169_private *tp) > +{ > + rtl_set_def_aspm_entry_latency(tp); > + rtl_hw_start_8125_common(tp); > +} > + > static void rtl_hw_config(struct rtl8169_private *tp) > { > static const rtl_generic_fct hw_configs[] =3D { > @@ -3664,6 +3708,7 @@ static void rtl_hw_config(struct rtl8169_private *t= p) > [RTL_GIGA_MAC_VER_53] =3D rtl_hw_start_8117, > [RTL_GIGA_MAC_VER_61] =3D rtl_hw_start_8125a_2, > [RTL_GIGA_MAC_VER_63] =3D rtl_hw_start_8125b, > + [RTL_GIGA_MAC_VER_65] =3D rtl_hw_start_8126a, > }; > > if (hw_configs[tp->mac_version]) > @@ -3674,9 +3719,23 @@ static void rtl_hw_start_8125(struct rtl8169_priva= te *tp) > { > int i; > > + RTL_W8(tp, INT_CFG0_8125, 0x00); > + > /* disable interrupt coalescing */ > - for (i =3D 0xa00; i < 0xb00; i +=3D 4) > - RTL_W32(tp, i, 0); > + switch (tp->mac_version) { > + case RTL_GIGA_MAC_VER_61: > + for (i =3D 0xa00; i < 0xb00; i +=3D 4) > + RTL_W32(tp, i, 0); > + break; > + case RTL_GIGA_MAC_VER_63: > + case RTL_GIGA_MAC_VER_65: > + for (i =3D 0xa00; i < 0xa80; i +=3D 4) > + RTL_W32(tp, i, 0); > + RTL_W16(tp, INT_CFG1_8125, 0x0000); > + break; > + default: > + break; > + } > > rtl_hw_config(tp); > } > diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/ne= t/ethernet/realtek/r8169_phy_config.c > index b50f16786..badf78f81 100644 > --- a/drivers/net/ethernet/realtek/r8169_phy_config.c > +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c > @@ -1152,6 +1152,7 @@ void r8169_hw_phy_config(struct rtl8169_private *tp= , struct phy_device *phydev, > [RTL_GIGA_MAC_VER_53] =3D rtl8117_hw_phy_config, > [RTL_GIGA_MAC_VER_61] =3D rtl8125a_2_hw_phy_config, > [RTL_GIGA_MAC_VER_63] =3D rtl8125b_hw_phy_config, > + [RTL_GIGA_MAC_VER_65] =3D NULL, > }; > > if (phy_configs[ver]) -- Regards, Joe --=20 40 years of net history, a couple songs: https://www.youtube.com/watch?v=3DD9RGX6QFm5E Dave T=C3=A4ht CSO, LibreQos