Re: [Make-wifi-fast] [bufferbloat-fcc-discuss] arstechnica confirms tp-link router lockdown

[Adrian Chadd <adrian@freebsd.org>]

On 12 March 2016 at 11:14, Henning Rogge <hrogge@gmail.com> wrote:
> On Sat, Mar 12, 2016 at 3:32 PM, Wayne Workman
> <wayne.workman2012@gmail.com> wrote:
>> I understand that Broadcom was paid to develop the Pi, a totally free board.
>>
>> And they already make wireless chipsets.
>
> The question is how easy would it be to build a modern 802.11ac
> halfmac chip... the amount of work these chips do (especially with 3*3
> or 4*4 MIMO) is not trivial.

It's not that scary - most of the latency sensitive things are:

* channel change - eg background scans
* calibration related things - but most slow calibration could be done
via firmware commands, like the intel chips do!
* transmit a-mpdu / retransmit
* transmit rate control adaptation
* receiving / block-ack things - which is mostly done in hardware anyway
* likely some power save transition-y things too

If you're doing STA mode, then you have more things to do - eg bgscans
with active traffic, TDLS, P2P, etc.
If you're doing hostap mode or heck, even mostly-dumb ibss mode -
where there's no requirement for off-channel traffic - the firmware is
mostly just a transmit/receive engine and some power save stuff.

And honestly - know how many cycles a modern CPU has? If you don't
care about hyper-optimising for power consumption (ie, you're not a
phone), then I bet you could get away with ath9k model hardware. Those
same lower end CPUs can do 200kpps on an ethernet NIC right now. The
reordering and retransmit stuff could be handled in firmware, but
that's about it - and again, only if you wanted to do it on some
anenmic SoC or you cared about power.

People keep talking about "oh god, these things do so much now" - but
that's because people are thinking about phones or those L2-cache-less
anemic older SOCs that are massively memory bandwidth constrained.
Newer stuff is much less terrible.



-adrian