[Bloat] Hardware upticks

[Steinar H. Gunderson]

On Tue, Jan 05, 2016 at 11:37:02AM -0800, Dave Täht wrote:
>> Anyway, the biggest cost of a context switch isn't necessarily the time used
>> to set up registers and such. It's increased L1 pressure; your CPU is now
>> running different code and looking at (largely) different data.
> A L1/L2 Icache dedicated to interrupt processing code could make a great
> deal of difference, if only cpu makers and benchmarkers would make
> CS time something we valued.
> 
> Dcache, not so much, except for the intel architectures which are now
> doing DMA direct to cache. (any arms doing that?)

Note that I'm saying L1 pressure, not “bad choice of what to keep in L1”.
If you dedicate L1i space to interrupt processing code (which includes,
presumably, large parts of your TCP/IP stack?), you will have less for
your normal userspace, and I'd like to see some very hard data on that being
a win before I'll believe it at face value.

In a sense, if you tie your interrupts to a dedicated core, you get exactly
this, though.

/* Steinar */
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