<font face="arial" size="2"><p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">As a data point, I run Cake on a "Intel(R) Celeron(R) CPU N2930 @ 1.83GHz" with 2 cores, and 1 GB/sec cable modem network. My "router board" has two GigE ports, doesn't have WiFi. It uses Fedora 34 Server as its basis, runs dnsmasq for the main LAN serving DNS, DHCP, and running a Hurricane Electric /56 tunnel for v6.</p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">Doing testing with RRUL or various high-end web speed tests, I get full 1 GHz (usually >950 Mb/s throughput) download performance through it, and minimal bufferbloat (A+ on the speed tests that measure bufferbloat).. I also get full upload speed with no bufferbloat. </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">This, I believe, is a much slower board, with fewer cores, than the Odyssey. It never comes close to saturating one of the cores.</p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">I long ago gave up on trying to reflash consumer WiFi routers to serve as home gateway. (and now that cpus and memory are incredibly cheap, the proper architecture is not to bundle two unrelated functions into a single processor anyway, just have two boxes for the two functions)</p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">I do use them inside my premises as APs. Life is too short. As APs, they are limited by the damn WiFi chipsets and drivers, with their poor packet scheduling, which is not solved by Cake. That's a WiFi layer problem of queuing and scheduling in the MAC layer, and I think the WiFi chip vendors have been clueless for at least a decade, and show no sign of getting a clue, sad to say. They live in proprietary land, and really have no interest in fixing the MAC layer as long as they can claim extreme throughput in an artificial scenario between two points with no cross traffic.</p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;"> </p>
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">On Tuesday, July 6, 2021 10:26pm, "Dave Taht" <dave.taht@gmail.com> said:<br /><br /></p>
<div id="SafeStyles1625773122">
<p style="margin:0;padding:0;font-family: arial; font-size: 10pt; overflow-wrap: break-word;">> On Tue, Jul 6, 2021 at 3:32 PM Aaron Wood <woody77@gmail.com> wrote:<br />> ><br />> > I'm running an Odyssey from Seeed Studios (celeron J4125 with dual i211), and<br />> it can handle Cake at 1Gbps on a single core (which it needs to, because OpenWRT's<br />> i211 support still has multiple receive queues disabled).<br />> <br />> Not clear if that is shaped or not? Line rate is easy on processors of<br />> that class or better, but shaped?<br />> <br />> some points:<br />> <br />> On inbound shaping especially it it still best to lock network traffic<br />> to a single core in low end platforms.<br />> <br />> Cake itself is not multicore, although the design essentially is. We<br />> did some work towards trying to make it shape across multiple cores<br />> and multiple hardware queues. IF the locking contention could be<br />> minimized (RCU) I felt it possible for a win here, but a bigger win<br />> would be to eliminate "mirred" from the ingress path entirely.<br />> <br />> Even multiple transmit queues remains kind of dicy in linux, and<br />> actually tend to slow network processing in most cases I've tried at<br />> gbit line rates. They also add latency, as (1) BQL is MIAD, not AIMD,<br />> so it stays "stuck" at a "good" level for a long time, AND 2) each hw<br />> queue gets an additive fifo at this layer, so where, you might need<br />> only 40k to keep a single hw queue busy, you end up with 160k with 4<br />> hw queues. This problem is getting worse and worse (64 queues are<br />> common in newer hardware, 1000s in really new hardware) and a revisit<br />> to how BQL does things in this case would be useful. Ideally it would<br />> share state (with a cross core variable and atomic locks) as to how<br />> much total buffering was actually needed "down there" across all the<br />> queues, but without trying it, I worry that that would end up costing<br />> a lot of cpu cycles.<br />> <br />> Feel free to experiment with multiple transmit queues locked to other<br />> cores with the set-affinity bits in /proc/interrupts. I'm sure these<br />> MUST be useful on some platform, but I think most of the use for<br />> multiple hw queues is when a locally processing application is<br />> getting the data, not when it is being routed.<br />> <br />> Ironically, I guess, the shorter your queues the higher likelihood a<br />> given packet will remain in l2 or even l1 cache.<br />> <br />> I<br />> ><br />> > On Tue, Jun 22, 2021 at 12:44 AM Giuseppe De Luca <dropheaders@gmx.com><br />> wrote:<br />> >><br />> >> Also a PC Engines APU4 will do the job<br />> >> (https://inonius.net/results/?userId=17996087f5e8 - this is a<br />> >> 1gbit/1gbit, with Openwrt/sqm-scripts set to 900/900. ISP is Sony NURO<br />> >> in Japan). Will follow this thread to know if some interesting device<br />> >> popup :)<br />> >><br />> >><br />> >> https://inonius.net/results/?userId=17996087f5e8<br />> >><br />> >> On 6/22/2021 6:12 AM, Sebastian Moeller wrote:<br />> >> ><br />> >> > On 22 June 2021 06:00:48 CEST, Stephen Hemminger<br />> <stephen@networkplumber.org> wrote:<br />> >> >> Is there any consumer hardware that can actually keep up and do<br />> AQM at<br />> >> >> 1Gbit.<br />> >> > Over in the OpenWrt forums the same question pops up<br />> routinely once per week. The best answer ATM seems to be a combination of a<br />> raspberry pi4B with a decent USB3 gigabit ethernet dongle, a managed switch and<br />> any capable (OpenWrt) AP of the user's liking. With 4 arm A72 cores the will<br />> traffic shape up to a gigabit as reported by multiple users.<br />> >> ><br />> >> ><br />> >> >> It seems everyone seems obsessed with gamer Wifi 6. But can only<br />> do<br />> >> >> 300Mbit single<br />> >> >> stream with any kind of QoS.<br />> >> > IIUC most commercial home routers/APs bet on offload engines to do<br />> most of the heavy lifting, but as far as I understand only the NSS cores have a<br />> shaper and fq_codel module....<br />> >> ><br />> >> ><br />> >> >> It doesn't help that all the local ISP's claim 10Mbit upload<br />> even with<br />> >> >> 1G download.<br />> >> >> Is this a head end provisioning problem or related to Docsis 3.0<br />> (or<br />> >> >> later) modems?<br />> >> > For DOCSIS the issue seems to be an unfortunate frequency split<br />> between up and downstream and use of lower efficiency coding schemes .<br />> >> > Over here the incumbent cable isp provisions fifty Mbps for<br />> upstream and plans to increase that to hundred once the upstream is switched to<br />> docsis 3.1.<br />> >> > I believe one issue is that since most of the upstream is required<br />> for the reverse ACK traffic for the download and hence it can not be<br />> oversubscribed too much.... but I think we have real docsis experts on the list,<br />> so I will stop my speculation here...<br />> >> ><br />> >> > Regards<br />> >> > Sebastian<br />> >> ><br />> >> ><br />> >> ><br />> >> ><br />> >> >> _______________________________________________<br />> >> >> Bloat mailing list<br />> >> >> Bloat@lists.bufferbloat.net<br />> >> >> https://lists.bufferbloat.net/listinfo/bloat<br />> >> _______________________________________________<br />> >> Bloat mailing list<br />> >> Bloat@lists.bufferbloat.net<br />> >> https://lists.bufferbloat.net/listinfo/bloat<br />> ><br />> > _______________________________________________<br />> > Bloat mailing list<br />> > Bloat@lists.bufferbloat.net<br />> > https://lists.bufferbloat.net/listinfo/bloat<br />> <br />> <br />> <br />> --<br />> Latest Podcast:<br />> https://www.linkedin.com/feed/update/urn:li:activity:6791014284936785920/<br />> <br />> Dave Täht CTO, TekLibre, LLC<br />> _______________________________________________<br />> Cake mailing list<br />> Cake@lists.bufferbloat.net<br />> https://lists.bufferbloat.net/listinfo/cake<br />> </p>
</div></font>