[Cerowrt-devel] [Bloat] Comcast upped service levels -> WNDR3800 can't cope...
rick.jones2 at hp.com
Fri Aug 29 13:03:14 EDT 2014
On 08/29/2014 09:57 AM, Aaron Wood wrote:
> Or, we need to find a way to implement the system such that it doesn't
> max out a 680MHz mips core just to push 100Mbps of data. That's roughly
> 10K cpu cycles per packet, which seems like an awful lot. Unless the
> other problem is that the memory bus just can't keep up. My experience
> of a lot of these processors is that the low-level offload engines have
> great DMA capabilities for "wire-speed" operation, but that the
> processor core itself can't move data to save it's life.
In the long ago and far away, it used to be opined that one
could/would/should get 1 Mbit/s per MHz. Though that may have been for
a situation where there wasn't much besides just the plain TCP/IP stack
running (eg without firewall bits etc going).
Does "perf" run on MIPS in the kernel you are running?
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