[Cerowrt-devel] amd ryzen embedded nucs
dave.taht at gmail.com
Tue Aug 20 19:30:09 EDT 2019
On Tue, Aug 20, 2019 at 4:23 PM Luis E. Garcia <luis at bitamins.net> wrote:
> Have you upgraded the firmware on your apu2 boxes? The was a performance issue that was fixed a few weeks back.
"the firmware" - do you mean openwrt? or the bios? link?
I would be *delighted* to be able to shape inbound on those boxes to
nearly ~1gbit. On the other hand it would
run me out of motivation to try and make a quad core shaper work....
(not that I have a lot of motivation, since
it's been a year since I last tried, and it was pretty invasive....
I really liked the new "listification" work going on in mainline.
Still, my dream was to be rid of mirred entirely, and
to be able to do:
tc qdisc add dev eth0 ingress cake bandwidth X
tc qdisc add dev eth0 ingress mq bandwidth X
tc qdisc add dev eth0 ingress handle 1:1 cake
tc qdisc add dev eth0 ingress handle 1:2 cake
Which looked possible to fall out of that work (but haven't checked in a year)
> On Tue, Aug 20, 2019 at 5:15 PM Dave Taht <dave.taht at gmail.com> wrote:
>> since we run the apu2 out of cpu on inbound shaping, there are some
>> new ryzen boxes appearing. Here's one....
>> I don't know why it uses realtek ethernet as the soc has 10Gbit
>> capable ethernet onboard.
>> Dave Täht
>> CTO, TekLibre, LLC
>> Tel: 1-831-205-9740
>> Cerowrt-devel mailing list
>> Cerowrt-devel at lists.bufferbloat.net
CTO, TekLibre, LLC
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