[Cerowrt-devel] mips goes risc-v

Xianjun Jiao (UGent-imec) Xianjun.Jiao at UGent.be
Tue Mar 9 08:03:14 EST 2021

risc-v indeed is getting more and more developers. I also looked into it a lot. In principle, there is a chance that some of the openwifi low level state machines (for low MAC protocol) could be replaced by some simple risc-v cores. -- Just some wild/initial ideas, no resource/action planned yet.

Best regards,
Xianjun Jiao
Senior researcher, imec - Gent university
210.007, floor 11, Technologiepark 126, 9052, Ghent, Belgium

From: Dave Taht <dave.taht at gmail.com>
Sent: Tuesday, March 9, 2021 4:42:24 AM
To: cerowrt-devel
Subject: mips goes risc-v


To me my biggest kvetch about the risc-v effort was the lack of
additional on-chip IP support, which,
lacking compatible busses and so on, was going to limit multiple
generations of chips to just what could be developed afresh. Even
"simple" IP blocks like usb support take time. While I really like
"chisel" as a design language, it is far behind what arm and intel
use. But: With the mips licensees scrambling to reuse their IP,
somehow, and move to risc-v, I think this architecture has an ever
increasing chance of success.

It's been a really good couple of months for open source this or that.
I keep hoping someone will seriously fund
https://github.com/open-sdr/openwifi  as well, for, in order to handle
the complexities of 802.11n and beyond, a co-processor with some
serious oomph, and a well designed piece of open firmware, is needed.

"For a successful technology, reality must take precedence over public
relations, for Mother Nature cannot be fooled" - Richard Feynman

dave at taht.net <Dave Täht> CTO, TekLibre, LLC Tel: 1-831-435-0729
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