From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-vx0-f171.google.com (mail-vx0-f171.google.com [209.85.220.171]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by huchra.bufferbloat.net (Postfix) with ESMTPS id CBAA520036C for ; Sat, 17 Mar 2012 14:53:25 -0700 (PDT) Received: by vcbfl15 with SMTP id fl15so11395783vcb.16 for ; Sat, 17 Mar 2012 14:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=UVHAjF1s8YsgAT/945X4SqrXDimJkngUn9CnGyaZ/kE=; b=MPXHji7FTOeMkRtHpCTPvwYRPWa3NXHkEl0b2lTR3JKUzvYn/SoEpXRO2U8zBY4LYP Ggk7rFdUOYkKHN41WkhNiEkPLudY8jtD47OwyYqMo/lc6EpDhl4pC6hNxRXU033LgXXY JVBwEabkhCmFNbUFWRk01oPxAqduumXrR/WCBNgOz/EBUjQwqFI/u39AzlI5xra/Z2ni fNsQB7OO6JlV+Luw4dbuHem4jd9JoAcAjfORDKEQh/JDwhbW+aO8wkPAarK25xcm8MEd Whmvvm1OV+emVHGfsVmDypYkz7eGKfKxZOkYBn51VRhWcLCiQj036fJ7sQyqkUiKeqC1 ryKg== MIME-Version: 1.0 Received: by 10.52.179.168 with SMTP id dh8mr3182800vdc.120.1332021204803; Sat, 17 Mar 2012 14:53:24 -0700 (PDT) Received: by 10.220.140.132 with HTTP; Sat, 17 Mar 2012 14:53:24 -0700 (PDT) In-Reply-To: <4F64D22C.60600@c3energy.com> References: <20111025095801.C9A9D800037@ip-64-139-1-69.sjc.megapath.net> <4F64A2EC.1020805@c3energy.com> <4F64D22C.60600@c3energy.com> Date: Sat, 17 Mar 2012 16:53:24 -0500 Message-ID: From: Patrick Maupin To: "Ron Frazier (NTP)" Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: thumbgps-devel@lists.bufferbloat.net Subject: Re: [Thumbgps-devel] Fwd: Long term SiRF data X-BeenThere: thumbgps-devel@lists.bufferbloat.net X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 17 Mar 2012 21:53:26 -0000 On Sat, Mar 17, 2012 at 1:04 PM, Ron Frazier (NTP) wrote: > I don't know what all your design criteria are, but for just the little > piece of the problem you mentioned above, you could try something like th= is. > =A0Take the output of one of those OCXO's, which I think you said is 26 M= hz. > =A0If I'm doing my math right, run that through a 15 bit counter to divid= e it > down. =A0The output should be a very accurate 793.457 Hz square wave. =A0= You > could, of course add more bits to divide further. =A0You could also add s= ome > glue logic to reset the counter at any point you wanted, to get less ugly > output frequencies. =A0Take that 793 Hz square wave and feed it into one = of > the handshaking pins, like DCD, on any Prolific or FTDI based serial - us= b > converter that passes handshaking. =A0I have a Trendnet TU-S9 unit which = I > hope to be testing soon. =A0This should give you very consistent USB mess= ages > coming from the converter with a period of about 1.2 ms. I'm not a huge fan of discrete logic, and I'm buying reasonable sized FPGAs, so we don't need to do really fancy stuff to get count values that we want. It will be dead easy. In fact, my thought was that the system could tell it what frequency it wanted to be interrupted. Sometimes you might want to monitor things closely, other times just run minimal interrupts in the background. Also, I can send characters to the host with fairly precise timing (the parallel mode of the FTDI has a SIWU pin that you can assert to empty the buffer to the host), so I thought I could send a counter to the host, so you'd never get "lost". I can also send timestamps for external events, if we hook it up to other hardware. BTW, the FPGA can internally multiply the clock up to around 200 MHz, with only around 300 ps of jitter, so I can interrupt at pretty much whatever really precise rate we want. For work designs, I usually pick a clock rate around 130 MHz or so as a nice balance -- 7.5 ns gives you close timing, and you can still get plenty of gates between flops without violating timing. At work I'm usually using something like 8.192 MHz * 16 =3D 131.072 MHz, but with a 26 MHz crystal, I'll just use 26 * 5 =3D 130.000 MHz. I've used the parallel mode of the FTDI chip a lot, and I can transfer data between the FTDI and the FPGA at an equivalent baud rate > 30 MBaud, so we can have pretty tight tolerances there as well. So the whole thing should be pretty flexible. Regards, Pat