[Bloat] [Starlink] Of interest: Comcast AQM Paper

Jonathan Morton chromatix99 at gmail.com
Wed Aug 4 14:58:09 EDT 2021

On Wed, 4 Aug 2021 at 21:31, Juliusz Chroboczek <jch at irif.fr> wrote:
> A Cortex-A53 SoC at 1GHz with correctly designed Ethernet (i.e. not the
> Raspberry Pi) can push 1Gbit from userspace without breaking a sweat.

That was true of the earlier Raspberry Pis (eg. the Pi 3 uses a brace
of Cortex-A53s) which use Ethernet chipsets attached over USB 2, but
the Pi 4B has a directly integrated Ethernet port and two of the
external USB ports are USB 3, giving enough bandwidth to attach a
second GigE port.  We have tested this in practice, and got full line
rate throughput through Cake (though the CPU usage went up fairly
sharply after about halfway).

The Compute Module 4 exposes the same integrated Ethernet port, and a
PCIe lane in place of the USB 3 chipset (the latter being attached to
the former in the standard Pi 4B).  This obviously allows attaching at
least one real GigE port (with a free choice of PCIe-based chipset) at
full line rate, without the intermediate step of USB.  I think it
would be reasonable to include a small Ethernet switch downstream of
this, matching the connectivity of typical CPE on the LAN side.  If a
PCIe switch is inserted, then a choice of Mini-PCIe Wifi cards can be
installed, with cables running to the normal array of external
antennae, sidestepping the problem of USB Wifi dongles.

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