[Cake] [Cerowrt-devel] expressobin
Joel Wirāmu Pauling
joel at aenertia.net
Fri Aug 3 18:55:48 EDT 2018
Needs 802.3bz capable Copper ports IMNSHO.
I don't plan on buying new dev boards from until there is something with
these that isn't terrible.
On 4 August 2018 at 03:30, dpreed at deepplum.com <dpreed at deepplum.com> wrote:
> Looks interesting... I like the SFP+ being there, too.
> (Regarding Xilinx ... My focus is on the FPGA. The ARM cores are less
> interesting, other than that the FPGA side can directly access their cache
> system creating a powerful, fast, coherent autonomous DDR backed memory
> addressable memeory for packets that does not need processor intervention.
> But Xilinx parts are not cheap)
> -----Original Message-----
> From: "Dave Taht" <dave.taht at gmail.com>
> Sent: Wed, Aug 1, 2018 at 4:06 pm
> To: dpreed at deepplum.com
> Cc: "Toke HÃ¸iland-JÃ¸rgensen" <toke at toke.dk>, "Daniel Ezell" <
> dezell at stonescry.com>, "Cake List" <cake at lists.bufferbloat.net>,
> cerowrt-devel at lists.bufferbloat.net
> Subject: Re: Re: [Cerowrt-devel] expressobin
> On Wed, Aug 1, 2018 at 5:49 AM dpreed at deepplum.com wrote:
> > Yeah. Small FF 2 port Celeron board is what I use. And I have a 4 port
> Atom that runs like a bat out of hell.
> > Currenty fiddling with Xilinx Dev boards, just put packet processing in
> FPGA for Cake, and no problem with 2.5 - 10 Gb/sec. Just need a free piece
> of low level SFP+ interfacing logic.
> cool. which? ultrascale?
> I was looking over
> http://cseweb.ucsd.edu/~ssradhak/Papers/senic-nsdi14.pdf again
> > My use case is using the open ChipLink/TileLink bus from RISCV rather
> than PCIe, making something that might be an open source ASIC design.
> How fast can that cpu context switch?
> > -----Original Message-----
> > From: "Toke HÃƒÂ¸iland-JÃƒÂ¸rgensen"
> > Sent: Wed, Aug 1, 2018 at 5:23 am
> > To: "Dave Taht" , "Daniel Ezell"
> > Cc: "Dave Taht" , "Daniel Ezell" , "Cake List" , cerowrt-devel at lists.
> > Subject: Re: [Cerowrt-devel] expressobin
> > Dave Taht writes:
> > > It turns out it's just two ethernets with one, connected to a 2 port
> > > switch. Not what I wanted. I'd wanted something different from the
> > > apu2 or edgerouter X to play with, and I know the mvneta driver was
> > > bql'd.
> > I bought one of these to play with:
> > https://teklager.se/en/products/routers/tlsense-i3-4lan
> > x86 (i3 processor), four real ethernet ports, and passively cooled. A
> > bit pricy, though; more than $400... But doubles well as a combined
> > switch and media player :)
> > -Toke
> > _______________________________________________
> > Cerowrt-devel mailing list
> > Cerowrt-devel at lists.bufferbloat.net
> > https://lists.bufferbloat.net/listinfo/cerowrt-devel
> Dave TÃ¤ht
> CEO, TekLibre, LLC
> Tel: 1-669-226-2619
> Cerowrt-devel mailing list
> Cerowrt-devel at lists.bufferbloat.net
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