[Cerowrt-devel] hardware hacking on fq_codel in FPGA form at 10GigE

[Dave Taht]

On Thu, Dec 20, 2012 at 4:13 AM, Dave Taht <dave.taht at gmail.com> wrote:
> On Thu, Dec 20, 2012 at 3:17 AM, Hal Murray <hmurray at megapathdsl.net> wrote:
>>
>> If I was going to do something like that, I'd build a small/simple CPU and do
>> the work in microcode.

I'd also looked at the octeon and the latest arm chipset from TI which
I can't remember the codename for at the moment...

http://www.cavium.com/OCTEON-II_CN68XX.html

Looks like cavium is going ARM with their next chip.

I'd certainly like to see an IP block for arm socs for this stuff too.
Given the huge number of offloads in the network path on most upcoming
SOCs, it's going to be hard to wedge queue management on top in
software. See, for example, the mindspeed C2000. So it seems like
finding an arm design house to get an IP block for fq_codel put
together is in order.

There are a couple interesting hybrid fpga/arm chips from places like st micro.

-- 
Dave Täht

Fixing bufferbloat with cerowrt: http://www.teklibre.com/cerowrt/subscribe.html