[Cerowrt-devel] anybody know anything about the armada 3700?

[dpreed at reed.com]

Reading between the lines on the datasheet, the "packet processor" doesn't look to be anything fancy or problematic.  It contains:

DMA - meaning that it will transfer into and out of the Tx and Rx rings in RAM automatically. Every NIC does DMA at the packet level.

PTP (IEEE1588) essentially this just timestamps packets as they are being sent and as they are being received on the wire. Has to be in the hardware device to make PTP precise enough to do nanosecond-level clock sync. But the PTP protocol (which does all kinds of fancy "frequency lock" algorithms, etc. won't be in there, just the timestamping and perhaps a high res clock register.

Buffer management - as a frame arrives off of the cable, you can't just stream it into snd out of RAM without some buffering to cope with the multiportedness of coherent RAM and the scatter/gather of data for a frame into RAM buffers in the Tx/Rx rings. This would just be the logic for that.

Also, if you look at the description of "features" there are no networking "features" listed that suggest advanced functionality or another specialized microcontroller doing magic.

So I suspect that the packet processor is less complex than a typical 1 GigE NIC - no checksum offload, no TSO, no ... there's not even a switch between the two ports. You get to do it all in software, which is great.

Having NBASE-T is also pretty nice, though there's not a lot of gear for the other end of the NBASE-T connection out there (though NBASE-T switches are becoming a standard for attaching 802.11ac in enterprise campuses to aggregate them into a 10 GigE or faster datacenter switch).

I do have CAT-6A throughout my house, so I wonder if I can wire my house with NBASE-T if I replace my GigE switch... :-)






On Tuesday, October 4, 2016 12:18pm, "Dave Taht" <dave.taht at gmail.com> said:

> On Tue, Oct 4, 2016 at 2:46 AM, Mikael Abrahamsson <swmike at swm.pp.se> wrote:
>> On Mon, 3 Oct 2016, Dave Taht wrote:
>>
>>>
>>> https://www.kickstarter.com/projects/874883570/marvell-espressobin-board?token=6a67e544
>>
>>
>> Oh, oh, another device with a "packet processor".
>>
>> http://www.marvell.com/embedded-processors/assets/Marvell-88F37xx-Product-Brief-20160830.pdf
>>
>> Do we know anything about this packet processor and FOSS support for it? I
>> guess the "buffer manager" is very much of interest to anti-bufferbloat...
> 
> Well, it's a competitor to the edgerouter X pricewise, and my hope
> would be with the cache coherent I/O and the arm v8s that it could
> push 1Gbit with ease out each port, regardless of offloads. USB3 makes
> for high speed nas capability, (although I have high hopes for usb-c
> on something router-ish someday). Also I am gradually thinking we'll
> start seeing more 2.5gbit ethernet over TP. And there's a mini-pcie
> slot for wifi-card-of-choice...
> 
> all at a pricepoint that's lower than almost anything I've seen with
> these capabilities.
> 
> Who knows, perhaps the "full SDK" will allow for programming the
> packet coprocessor?
> /me drinks some kool-aid
> 
> Downsides: Globalscale, historically, has had heat issues in their
> designs. And it is quite far from shipping, as yet.
> 
>>
>> --
>> Mikael Abrahamsson    email: swmike at swm.pp.se
> 
> 
> 
> --
> Dave Täht
> Let's go make home routers and wifi faster! With better software!
> http://blog.cerowrt.org
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